[DAGCombiner] Ensure poison-generating flags are stripped in freeze op

When combining `freeze` in DAG, poison-generating flags were previously
not fully removed as intended. This change explicitly drops these flags
from `freeze` operand, ensuring a fixed, non-poisonous value at this
point in computation.

Author: antoniofrighetto

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

@@ -16151,6 +16151,7 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
                              SVN->getMask());
   } else {
     // NOTE: this strips poison generating flags.
+    N0->dropFlags(SDNodeFlags::PoisonGeneratingFlags);
     R = DAG.getNode(N0.getOpcode(), SDLoc(N0), N0->getVTList(), Ops);
   }
   assert(DAG.isGuaranteedNotToBeUndefOrPoison(R, /*PoisonOnly*/ false) &&

llvm/test/CodeGen/ARM/dagcombine-drop-flags-freeze.ll

@@ -0,0 +1,40 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=arm-linux-gnueabi -mcpu=arm1022e -mattr=armv5te -o - %s | FileCheck %s
+
+; Ensure poison-generating flags are stripped by the time a freeze operand is visited.
+
+@g_ptr = global ptr null, align 4
+
+define ptr @drop_flags(i32 noundef %numentries, i64 %cond, i64 %arg) local_unnamed_addr #0 {
+; CHECK-LABEL: drop_flags:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    ldm sp, {r1, r12}
+; CHECK-NEXT:    subs r1, r2, r1
+; CHECK-NEXT:    sbcs r1, r3, r12
+; CHECK-NEXT:    movlo r0, r2
+; CHECK-NEXT:    cmp r0, #0
+; CHECK-NEXT:    ldr r0, .LCPI0_0
+; CHECK-NEXT:    ldr r0, [r0]
+; CHECK-NEXT:    bx lr
+; CHECK-NEXT:    .p2align 2
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI0_0:
+; CHECK-NEXT:    .long g_ptr
+entry:
+  %cmp4 = icmp samesign ult i64 %cond, %arg
+  %conv6 = trunc nuw i64 %cond to i32
+  %spec.select = select i1 %cmp4, i32 %conv6, i32 %numentries
+  %spec.select.fr = freeze i32 %spec.select
+  %cmpz = icmp eq i32 %spec.select.fr, 0
+  br i1 %cmpz, label %bb.end, label %bb.false
+
+bb.false:                                       ; preds = %entry
+  %2 = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 %spec.select.fr, i1 true)
+  br label %bb.end
+
+bb.end:                                         ; preds = %entry, %bb.false
+  %3 = load ptr, ptr @g_ptr, align 4
+  ret ptr %3
+}
+
+declare i32 @llvm.ctlz.i32(i32, i1)