@@ -28,6 +28,9 @@ int16_t3 test_clamp_short3(int16_t3 p0, int16_t3 p1) { return clamp(p0, p1,p1);
2828// NATIVE_HALF: define [[FNATTRS]] <4 x i16> @_Z17test_clamp_short4
2929// NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].sclamp.v4i16
3030int16_t4 test_clamp_short4 (int16_t4 p0, int16_t4 p1) { return clamp (p0, p1,p1); }
31+ // NATIVE_HALF: define [[FNATTRS]] <4 x i16> {{.*}}test_clamp_short4_mismatch
32+ // NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].sclamp.v4i16
33+ int16_t4 test_clamp_short4_mismatch (int16_t4 p0, int16_t p1) { return clamp (p0, p0,p1); }
3134
3235// NATIVE_HALF: define [[FNATTRS]] i16 @_Z17test_clamp_ushort
3336// NATIVE_HALF: call i16 @llvm.[[TARGET]].uclamp.i16(
@@ -41,6 +44,9 @@ uint16_t3 test_clamp_ushort3(uint16_t3 p0, uint16_t3 p1) { return clamp(p0, p1,p
4144// NATIVE_HALF: define [[FNATTRS]] <4 x i16> @_Z18test_clamp_ushort4
4245// NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].uclamp.v4i16
4346uint16_t4 test_clamp_ushort4 (uint16_t4 p0, uint16_t4 p1) { return clamp (p0, p1,p1); }
47+ // NATIVE_HALF: define [[FNATTRS]] <4 x i16> {{.*}}test_clamp_ushort4_mismatch
48+ // NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].uclamp.v4i16
49+ uint16_t4 test_clamp_ushort4_mismatch (uint16_t4 p0, uint16_t p1) { return clamp (p0, p0,p1); }
4450#endif
4551
4652// CHECK: define [[FNATTRS]] i32 @_Z14test_clamp_int
@@ -55,6 +61,9 @@ int3 test_clamp_int3(int3 p0, int3 p1) { return clamp(p0, p1,p1); }
5561// CHECK: define [[FNATTRS]] <4 x i32> @_Z15test_clamp_int4
5662// CHECK: call <4 x i32> @llvm.[[TARGET]].sclamp.v4i32
5763int4 test_clamp_int4 (int4 p0, int4 p1) { return clamp (p0, p1,p1); }
64+ // CHECK: define [[FNATTRS]] <4 x i32> {{.*}}test_clamp_int4_mismatch
65+ // CHECK: call <4 x i32> @llvm.[[TARGET]].sclamp.v4i32
66+ int4 test_clamp_int4_mismatch (int4 p0, int p1) { return clamp (p0, p0,p1); }
5867
5968// CHECK: define [[FNATTRS]] i32 @_Z15test_clamp_uint
6069// CHECK: call i32 @llvm.[[TARGET]].uclamp.i32(
@@ -68,6 +77,9 @@ uint3 test_clamp_uint3(uint3 p0, uint3 p1) { return clamp(p0, p1,p1); }
6877// CHECK: define [[FNATTRS]] <4 x i32> @_Z16test_clamp_uint4
6978// CHECK: call <4 x i32> @llvm.[[TARGET]].uclamp.v4i32
7079uint4 test_clamp_uint4 (uint4 p0, uint4 p1) { return clamp (p0, p1,p1); }
80+ // CHECK: define [[FNATTRS]] <4 x i32> {{.*}}test_clamp_uint4_mismatch
81+ // CHECK: call <4 x i32> @llvm.[[TARGET]].uclamp.v4i32
82+ uint4 test_clamp_uint4_mismatch (uint4 p0, uint p1) { return clamp (p0, p0,p1); }
7183
7284// CHECK: define [[FNATTRS]] i64 @_Z15test_clamp_long
7385// CHECK: call i64 @llvm.[[TARGET]].sclamp.i64(
@@ -81,6 +93,9 @@ int64_t3 test_clamp_long3(int64_t3 p0, int64_t3 p1) { return clamp(p0, p1,p1); }
8193// CHECK: define [[FNATTRS]] <4 x i64> @_Z16test_clamp_long4
8294// CHECK: call <4 x i64> @llvm.[[TARGET]].sclamp.v4i64
8395int64_t4 test_clamp_long4 (int64_t4 p0, int64_t4 p1) { return clamp (p0, p1,p1); }
96+ // CHECK: define [[FNATTRS]] <4 x i64> {{.*}}test_clamp_long4_mismatch
97+ // CHECK: call <4 x i64> @llvm.[[TARGET]].sclamp.v4i64
98+ int64_t4 test_clamp_long4_mismatch (int64_t4 p0, int64_t p1) { return clamp (p0, p0,p1); }
8499
85100// CHECK: define [[FNATTRS]] i64 @_Z16test_clamp_ulong
86101// CHECK: call i64 @llvm.[[TARGET]].uclamp.i64(
@@ -94,6 +109,9 @@ uint64_t3 test_clamp_ulong3(uint64_t3 p0, uint64_t3 p1) { return clamp(p0, p1,p1
94109// CHECK: define [[FNATTRS]] <4 x i64> @_Z17test_clamp_ulong4
95110// CHECK: call <4 x i64> @llvm.[[TARGET]].uclamp.v4i64
96111uint64_t4 test_clamp_ulong4 (uint64_t4 p0, uint64_t4 p1) { return clamp (p0, p1,p1); }
112+ // CHECK: define [[FNATTRS]] <4 x i64> {{.*}}test_clamp_ulong4_mismatch
113+ // CHECK: call <4 x i64> @llvm.[[TARGET]].uclamp.v4i64
114+ uint64_t4 test_clamp_ulong4_mismatch (uint64_t4 p0, uint64_t p1) { return clamp (p0, p0,p1); }
97115
98116// NATIVE_HALF: define [[FNATTRS]] [[FFNATTRS]] half @_Z15test_clamp_half
99117// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn half @llvm.[[TARGET]].nclamp.f16(
@@ -115,6 +133,11 @@ half3 test_clamp_half3(half3 p0, half3 p1) { return clamp(p0, p1,p1); }
115133// NO_HALF: define [[FNATTRS]] [[FFNATTRS]] <4 x float> @_Z16test_clamp_half4
116134// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32(
117135half4 test_clamp_half4 (half4 p0, half4 p1) { return clamp (p0, p1,p1); }
136+ // NATIVE_HALF: define [[FNATTRS]] [[FFNATTRS]] <4 x half> {{.*}}test_clamp_half4_mismatch
137+ // NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.[[TARGET]].nclamp.v4f16
138+ // NO_HALF: define [[FNATTRS]] [[FFNATTRS]] <4 x float> {{.*}}test_clamp_half4_mismatch
139+ // NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32(
140+ half4 test_clamp_half4_mismatch (half4 p0, half p1) { return clamp (p0, p0,p1); }
118141
119142// CHECK: define [[FNATTRS]] [[FFNATTRS]] float @_Z16test_clamp_float
120143// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].nclamp.f32(
@@ -128,6 +151,9 @@ float3 test_clamp_float3(float3 p0, float3 p1) { return clamp(p0, p1,p1); }
128151// CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x float> @_Z17test_clamp_float4
129152// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32
130153float4 test_clamp_float4 (float4 p0, float4 p1) { return clamp (p0, p1,p1); }
154+ // CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x float> {{.*}}test_clamp_float4_mismatch
155+ // CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32
156+ float4 test_clamp_float4_mismatch (float4 p0, float p1) { return clamp (p0, p0,p1); }
131157
132158// CHECK: define [[FNATTRS]] [[FFNATTRS]] double @_Z17test_clamp_double
133159// CHECK: call reassoc nnan ninf nsz arcp afn double @llvm.[[TARGET]].nclamp.f64(
@@ -141,3 +167,29 @@ double3 test_clamp_double3(double3 p0, double3 p1) { return clamp(p0, p1,p1); }
141167// CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x double> @_Z18test_clamp_double4
142168// CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.[[TARGET]].nclamp.v4f64
143169double4 test_clamp_double4 (double4 p0, double4 p1) { return clamp (p0, p1,p1); }
170+ // CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x double> {{.*}}test_clamp_double4_mismatch
171+ // CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.[[TARGET]].nclamp.v4f64
172+ double4 test_clamp_double4_mismatch (double4 p0, double p1) { return clamp (p0, p0,p1); }
173+ // CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x double> {{.*}}test_clamp_double4_mismatch2
174+ // CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.[[TARGET]].nclamp.v4f64
175+ double4 test_clamp_double4_mismatch2 (double4 p0, double p1) { return clamp (p0, p1,p0); }
176+
177+ // CHECK: define [[FNATTRS]] <2 x i32> {{.*}}_overloads1
178+ // CHECK: call <2 x i32> @llvm.[[TARGET]].sclamp.v2i32
179+ int2 test_overloads1 (int2 p0, float2 p1, uint p2) { return clamp (p0, p1, p2); }
180+
181+ // CHECK: define [[FNATTRS]] [[FFNATTRS]] <2 x float> {{.*}}test_overloads2
182+ // CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].nclamp.v2f32
183+ float2 test_overloads2 (float2 p0, uint p1, int2 p2) { return clamp (p0, p1, p2); }
184+
185+ // CHECK: define [[FNATTRS]] <3 x i32> {{.*}}test_overloads3
186+ // CHECK: call <3 x i32> @llvm.[[TARGET]].uclamp.v3i32
187+ uint3 test_overloads3 (uint3 p0, int p1, float p2) { return clamp (p0, p1, p2); }
188+
189+ // CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x double> {{.*}}test_overloads4
190+ // CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.[[TARGET]].nclamp.v4f64
191+ double4 test_overloads4 (double4 p0, float4 p1, int4 p2) { return clamp (p0, p1, p2); }
192+
193+ // CHECK: define [[FNATTRS]] i32 {{.*}}test_overloads5
194+ // CHECK: call i32 @llvm.[[TARGET]].sclamp.i32(
195+ int test_overloads5 (int p0, uint p1, double p2) { return clamp (p0, p1, p2); }
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