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fixup! [MIPatternMatch] Add m_DeferredReg/Type
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llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -431,7 +431,7 @@ struct BinaryOp_match {
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if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
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return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
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R.match(MRI, TmpMI->getOperand(2).getReg())) ||
434-
// NOTE: When trying the alternative different operand ordering
434+
// NOTE: When trying the alternative operand ordering
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// with a commutative operation, it is imperative to always run
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// the LHS sub-pattern (i.e. `L`) before the RHS sub-pattern
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// (i.e. `R`). Otherwsie, m_DeferredReg/Type will not work as
@@ -461,7 +461,7 @@ struct BinaryOpc_match {
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TmpMI->getNumOperands() == 3) {
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return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
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R.match(MRI, TmpMI->getOperand(2).getReg())) ||
464-
// NOTE: When trying the alternative different operand ordering
464+
// NOTE: When trying the alternative operand ordering
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// with a commutative operation, it is imperative to always run
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// the LHS sub-pattern (i.e. `L`) before the RHS sub-pattern
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// (i.e. `R`). Otherwsie, m_DeferredReg/Type will not work as
@@ -714,7 +714,7 @@ struct CompareOp_match {
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Register RHS = TmpMI->getOperand(3).getReg();
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if (L.match(MRI, LHS) && R.match(MRI, RHS))
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return true;
717-
// NOTE: When trying the alternative different operand ordering
717+
// NOTE: When trying the alternative operand ordering
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// with a commutative operation, it is imperative to always run
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// the LHS sub-pattern (i.e. `L`) before the RHS sub-pattern
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// (i.e. `R`). Otherwsie, m_DeferredReg/Type will not work as expected.

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