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Address review comments
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llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 17 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -22807,32 +22807,15 @@ static SDValue scalarizeExtractedBinOp(SDNode *ExtElt, SelectionDAG &DAG,
2280722807
Vec->getNumValues() != 1)
2280822808
return SDValue();
2280922809

22810-
EVT ResVT = ExtElt->getValueType(0);
22811-
bool SetCCNeedsSignExt = false;
22812-
if (Opc == ISD::SETCC) {
22813-
EVT VecVT = Vec.getValueType();
22814-
if (ResVT != VecVT.getVectorElementType() || LegalTypes)
22815-
return SDValue();
22816-
22817-
if (ResVT != MVT::i1) {
22818-
bool VecRequiresSignExt = TLI.getBooleanContents(VecVT) ==
22819-
TargetLowering::ZeroOrNegativeOneBooleanContent;
22820-
bool ScalarRequiresSignExt =
22821-
TLI.getBooleanContents(ResVT) ==
22822-
TargetLowering::ZeroOrNegativeOneBooleanContent;
22823-
if (VecRequiresSignExt && !ScalarRequiresSignExt)
22824-
SetCCNeedsSignExt = true;
22825-
else if (!VecRequiresSignExt && ScalarRequiresSignExt) {
22826-
// There are currently no targets with this behaviour.
22827-
return SDValue();
22828-
}
22829-
}
22830-
}
22831-
2283222810
// Targets may want to avoid this to prevent an expensive register transfer.
2283322811
if (!TLI.shouldScalarizeBinop(Vec))
2283422812
return SDValue();
2283522813

22814+
EVT ResVT = ExtElt->getValueType(0);
22815+
if (Opc == ISD::SETCC &&
22816+
(ResVT != Vec.getValueType().getVectorElementType() || LegalTypes))
22817+
return SDValue();
22818+
2283622819
// Extracting an element of a vector constant is constant-folded, so this
2283722820
// transform is just replacing a vector op with a scalar op while moving the
2283822821
// extract.
@@ -22853,11 +22836,18 @@ static SDValue scalarizeExtractedBinOp(SDNode *ExtElt, SelectionDAG &DAG,
2285322836
Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, Op1, Index);
2285422837
SDValue NewVal = DAG.getSetCC(
2285522838
DL, ResVT, Op0, Op1, cast<CondCodeSDNode>(Vec->getOperand(2))->get());
22856-
// We may need to sign-extend the result to match the same behaviour as the
22857-
// vector version of SETCC.
22858-
if (SetCCNeedsSignExt)
22859-
NewVal = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, ResVT, NewVal,
22860-
DAG.getValueType(MVT::i1));
22839+
// We may need to sign- or zero-extend the result to match the same
22840+
// behaviour as the vector version of SETCC.
22841+
unsigned VecBoolContents = TLI.getBooleanContents(Vec.getValueType());
22842+
if (ResVT != MVT::i1 &&
22843+
VecBoolContents != TargetLowering::UndefinedBooleanContent &&
22844+
VecBoolContents != TLI.getBooleanContents(ResVT)) {
22845+
if (VecBoolContents == TargetLowering::ZeroOrNegativeOneBooleanContent)
22846+
NewVal = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, ResVT, NewVal,
22847+
DAG.getValueType(MVT::i1));
22848+
else
22849+
NewVal = DAG.getZeroExtendInReg(NewVal, DL, MVT::i1);
22850+
}
2286122851
return NewVal;
2286222852
}
2286322853
Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ResVT, Op0, Index);

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