@@ -163,11 +163,9 @@ class LoongArchAsmParser : public MCTargetAsmParser {
163163 void emitLoadAddressTLSGDLarge (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
164164
165165 // Helper to emit pseudo instruction "la.tls.desc $rd, sym".
166- void emitLoadAddressTLSDescAbs (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
167- void emitLoadAddressTLSDescPcrel (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
166+ void emitLoadAddressTLSDesc (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
168167 // Helper to emit pseudo instruction "la.tls.desc $rd, $rj, sym".
169- void emitLoadAddressTLSDescPcrelLarge (MCInst &Inst, SMLoc IDLoc,
170- MCStreamer &Out);
168+ void emitLoadAddressTLSDescLarge (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
171169
172170 // Helper to emit pseudo instruction "li.w/d $rd, $imm".
173171 void emitLoadImm (MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
@@ -1023,14 +1021,42 @@ void LoongArchAsmParser::emitLoadAddressPcrelLarge(MCInst &Inst, SMLoc IDLoc,
10231021void LoongArchAsmParser::emitLoadAddressGot (MCInst &Inst, SMLoc IDLoc,
10241022 MCStreamer &Out) {
10251023 // la.got $rd, sym
1026- // expands to:
1027- // pcalau12i $rd, %got_pc_hi20(sym)
1028- // ld.w/d $rd, $rd, %got_pc_lo12(sym)
10291024 MCRegister DestReg = Inst.getOperand (0 ).getReg ();
10301025 const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
10311026 InstSeq Insts;
10321027 unsigned LD = is64Bit () ? LoongArch::LD_D : LoongArch::LD_W;
10331028
1029+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
1030+ // with feature: +la-glabal-with-abs
1031+ // for 32bit:
1032+ // lu12i.w $rd, %got_hi20(sym)
1033+ // ori $rd, $rd, %got_lo12(sym)
1034+ // ld.w $rd, $rd, 0
1035+ //
1036+ // for 64bit:
1037+ // lu12i.w $rd, %got_hi20(sym)
1038+ // ori $rd, $rd, %got_lo12(sym)
1039+ // lu32i.d $rd, %got64_lo20(sym)
1040+ // lu52i.d $rd, $rd, %got64_hi12(sym)
1041+ // ld.d $rd, $rd, 0
1042+ Insts.push_back (LoongArchAsmParser::Inst (
1043+ LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_GOT_HI20));
1044+ Insts.push_back (LoongArchAsmParser::Inst (
1045+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_GOT_LO12));
1046+
1047+ if (is64Bit ()) {
1048+ Insts.push_back (LoongArchAsmParser::Inst (
1049+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_GOT64_LO20));
1050+ Insts.push_back (LoongArchAsmParser::Inst (
1051+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_GOT64_HI12));
1052+ }
1053+ Insts.push_back (LoongArchAsmParser::Inst (LD));
1054+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
1055+ return ;
1056+ }
1057+ // expands to:
1058+ // pcalau12i $rd, %got_pc_hi20(sym)
1059+ // ld.w/d $rd, $rd, %got_pc_lo12(sym)
10341060 Insts.push_back (LoongArchAsmParser::Inst (
10351061 LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_GOT_PC_HI20));
10361062 Insts.push_back (
@@ -1087,14 +1113,43 @@ void LoongArchAsmParser::emitLoadAddressTLSLE(MCInst &Inst, SMLoc IDLoc,
10871113void LoongArchAsmParser::emitLoadAddressTLSIE (MCInst &Inst, SMLoc IDLoc,
10881114 MCStreamer &Out) {
10891115 // la.tls.ie $rd, sym
1090- // expands to:
1091- // pcalau12i $rd, %ie_pc_hi20(sym)
1092- // ld.w/d $rd, $rd, %ie_pc_lo12(sym)
10931116 MCRegister DestReg = Inst.getOperand (0 ).getReg ();
10941117 const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
10951118 InstSeq Insts;
10961119 unsigned LD = is64Bit () ? LoongArch::LD_D : LoongArch::LD_W;
10971120
1121+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
1122+ // with feature: +la-glabal-with-abs
1123+ // for 32bit:
1124+ // lu12i.w $rd, %ie_hi20(sym)
1125+ // ori $rd, $rd, %ie_lo12(sym)
1126+ // ld.w $rd, $rd, 0
1127+ //
1128+ // for 64bit:
1129+ // lu12i.w $rd, %ie_hi20(sym)
1130+ // ori $rd, $rd, %ie_lo12(sym)
1131+ // lu32i.d $rd, %ie64_lo20(sym)
1132+ // lu52i.d $rd, $rd, %ie64_hi12(sym)
1133+ // ld.d $rd, $rd, 0
1134+ Insts.push_back (LoongArchAsmParser::Inst (
1135+ LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_TLS_IE_HI20));
1136+ Insts.push_back (LoongArchAsmParser::Inst (
1137+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_TLS_IE_LO12));
1138+
1139+ if (is64Bit ()) {
1140+ Insts.push_back (LoongArchAsmParser::Inst (
1141+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_TLS_IE64_LO20));
1142+ Insts.push_back (LoongArchAsmParser::Inst (
1143+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_TLS_IE64_HI12));
1144+ }
1145+ Insts.push_back (LoongArchAsmParser::Inst (LD));
1146+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
1147+ return ;
1148+ }
1149+
1150+ // expands to:
1151+ // pcalau12i $rd, %ie_pc_hi20(sym)
1152+ // ld.w/d $rd, $rd, %ie_pc_lo12(sym)
10981153 Insts.push_back (LoongArchAsmParser::Inst (
10991154 LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_TLS_IE_PC_HI20));
11001155 Insts.push_back (LoongArchAsmParser::Inst (
@@ -1133,14 +1188,40 @@ void LoongArchAsmParser::emitLoadAddressTLSIELarge(MCInst &Inst, SMLoc IDLoc,
11331188void LoongArchAsmParser::emitLoadAddressTLSLD (MCInst &Inst, SMLoc IDLoc,
11341189 MCStreamer &Out) {
11351190 // la.tls.ld $rd, sym
1136- // expands to:
1137- // pcalau12i $rd, %ld_pc_hi20(sym)
1138- // addi.w/d $rd, $rd, %got_pc_lo12(sym)
11391191 MCRegister DestReg = Inst.getOperand (0 ).getReg ();
11401192 const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
11411193 InstSeq Insts;
11421194 unsigned ADDI = is64Bit () ? LoongArch::ADDI_D : LoongArch::ADDI_W;
11431195
1196+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
1197+ // with feature: +la-glabal-with-abs
1198+ // for 32bit:
1199+ // lu12i.w $rd, %ld_hi20(sym)
1200+ // ori $rd, $rd, %got_lo12(sym)
1201+ //
1202+ // for 64bit:
1203+ // lu12i.w $rd, %ld_hi20(sym)
1204+ // ori $rd, $rd, %got_lo12(sym)
1205+ // lu32i.d $rd, %got64_lo20(sym)
1206+ // lu52i.d $rd, $rd, %got64_hi12(sym)
1207+ Insts.push_back (LoongArchAsmParser::Inst (
1208+ LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_TLS_LD_HI20));
1209+ Insts.push_back (LoongArchAsmParser::Inst (
1210+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_GOT_LO12));
1211+
1212+ if (is64Bit ()) {
1213+ Insts.push_back (LoongArchAsmParser::Inst (
1214+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_GOT64_LO20));
1215+ Insts.push_back (LoongArchAsmParser::Inst (
1216+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_GOT64_HI12));
1217+ }
1218+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
1219+ return ;
1220+ }
1221+
1222+ // expands to:
1223+ // pcalau12i $rd, %ld_pc_hi20(sym)
1224+ // addi.w/d $rd, $rd, %got_pc_lo12(sym)
11441225 Insts.push_back (LoongArchAsmParser::Inst (
11451226 LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_TLS_LD_PC_HI20));
11461227 Insts.push_back (LoongArchAsmParser::Inst (
@@ -1179,14 +1260,40 @@ void LoongArchAsmParser::emitLoadAddressTLSLDLarge(MCInst &Inst, SMLoc IDLoc,
11791260void LoongArchAsmParser::emitLoadAddressTLSGD (MCInst &Inst, SMLoc IDLoc,
11801261 MCStreamer &Out) {
11811262 // la.tls.gd $rd, sym
1182- // expands to:
1183- // pcalau12i $rd, %gd_pc_hi20(sym)
1184- // addi.w/d $rd, $rd, %got_pc_lo12(sym)
11851263 MCRegister DestReg = Inst.getOperand (0 ).getReg ();
11861264 const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
11871265 InstSeq Insts;
11881266 unsigned ADDI = is64Bit () ? LoongArch::ADDI_D : LoongArch::ADDI_W;
11891267
1268+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
1269+ // with feature: +la-glabal-with-abs
1270+ // for 32bit:
1271+ // lu12i.w $rd, %gd_hi20(sym)
1272+ // ori $rd, $rd, %got_lo12(sym)
1273+ //
1274+ // for 64bit:
1275+ // lu12i.w $rd, %gd_hi20(sym)
1276+ // ori $rd, $rd, %got_lo12(sym)
1277+ // lu32i.d $rd, %got64_lo20(sym)
1278+ // lu52i.d $rd, $rd, %got64_hi12(sym)
1279+ Insts.push_back (LoongArchAsmParser::Inst (
1280+ LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_TLS_GD_HI20));
1281+ Insts.push_back (LoongArchAsmParser::Inst (
1282+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_GOT_LO12));
1283+
1284+ if (is64Bit ()) {
1285+ Insts.push_back (LoongArchAsmParser::Inst (
1286+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_GOT64_LO20));
1287+ Insts.push_back (LoongArchAsmParser::Inst (
1288+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_GOT64_HI12));
1289+ }
1290+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
1291+ return ;
1292+ }
1293+
1294+ // expands to:
1295+ // pcalau12i $rd, %gd_pc_hi20(sym)
1296+ // addi.w/d $rd, $rd, %got_pc_lo12(sym)
11901297 Insts.push_back (LoongArchAsmParser::Inst (
11911298 LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_TLS_GD_PC_HI20));
11921299 Insts.push_back (LoongArchAsmParser::Inst (
@@ -1222,63 +1329,56 @@ void LoongArchAsmParser::emitLoadAddressTLSGDLarge(MCInst &Inst, SMLoc IDLoc,
12221329 emitLAInstSeq (DestReg, TmpReg, Symbol, Insts, IDLoc, Out);
12231330}
12241331
1225- void LoongArchAsmParser::emitLoadAddressTLSDescAbs (MCInst &Inst, SMLoc IDLoc,
1226- MCStreamer &Out) {
1227- // `la.tls.desc $rd, sym` with `la-global-with-abs` feature
1228- // for la32 expands to:
1229- // lu12i.w $rd, %desc_hi20(sym)
1230- // ori $rd, $rd, %desc_lo12(sym)
1231- // ld.w $ra, $rd, %desc_ld(sym)
1232- // jirl $ra, $ra, %desc_call(sym)
1233- //
1234- // for la64 expands to:
1235- // lu12i.w $rd, %desc_hi20(sym)
1236- // ori $rd, $rd, %desc_lo12(sym)
1237- // lu32i.d $rd, %desc64_lo20(sym)
1238- // lu52i.d $rd, $rd, %desc64_hi12(sym)
1239- // ld.d $ra, $rd, %desc_ld(sym)
1240- // jirl $ra, $ra, %desc_call(sym)
1332+ void LoongArchAsmParser::emitLoadAddressTLSDesc (MCInst &Inst, SMLoc IDLoc,
1333+ MCStreamer &Out) {
1334+ // la.tls.desc $rd, sym
12411335 MCRegister DestReg = Inst.getOperand (0 ).getReg ();
1242- const MCExpr *Symbol = Inst.getOpcode () == LoongArch::PseudoLA_TLS_DESC_ABS
1243- ? Inst.getOperand (1 ).getExpr ()
1244- : Inst.getOperand (2 ).getExpr ();
1336+ const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
1337+ unsigned ADDI = is64Bit () ? LoongArch::ADDI_D : LoongArch::ADDI_W;
12451338 unsigned LD = is64Bit () ? LoongArch::LD_D : LoongArch::LD_W;
12461339 InstSeq Insts;
12471340
1248- Insts.push_back (LoongArchAsmParser::Inst (
1249- LoongArch::LU12I_W, LoongArchMCExpr::VK_LoongArch_TLS_DESC_HI20));
1250- Insts.push_back (LoongArchAsmParser::Inst (
1251- LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_TLS_DESC_LO12));
1252-
1253- if (is64Bit ()) {
1341+ if (getSTI ().hasFeature (LoongArch::LaGlobalWithAbs)) {
1342+ // with feature: +la-glabal-with-abs
1343+ // for la32 expands to:
1344+ // lu12i.w $rd, %desc_hi20(sym)
1345+ // ori $rd, $rd, %desc_lo12(sym)
1346+ // ld.w $ra, $rd, %desc_ld(sym)
1347+ // jirl $ra, $ra, %desc_call(sym)
1348+ //
1349+ // for la64 expands to:
1350+ // lu12i.w $rd, %desc_hi20(sym)
1351+ // ori $rd, $rd, %desc_lo12(sym)
1352+ // lu32i.d $rd, %desc64_lo20(sym)
1353+ // lu52i.d $rd, $rd, %desc64_hi12(sym)
1354+ // ld.d $ra, $rd, %desc_ld(sym)
1355+ // jirl $ra, $ra, %desc_call(sym)
12541356 Insts.push_back (LoongArchAsmParser::Inst (
1255- LoongArch::LU32I_D , LoongArchMCExpr::VK_LoongArch_TLS_DESC64_LO20 ));
1357+ LoongArch::LU12I_W , LoongArchMCExpr::VK_LoongArch_TLS_DESC_HI20 ));
12561358 Insts.push_back (LoongArchAsmParser::Inst (
1257- LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_TLS_DESC64_HI12));
1258- }
1359+ LoongArch::ORI, LoongArchMCExpr::VK_LoongArch_TLS_DESC_LO12));
12591360
1260- Insts.push_back (
1261- LoongArchAsmParser::Inst (LD, LoongArchMCExpr::VK_LoongArch_TLS_DESC_LD));
1262- Insts.push_back (LoongArchAsmParser::Inst (
1263- LoongArch::JIRL, LoongArchMCExpr::VK_LoongArch_TLS_DESC_CALL));
1361+ if (is64Bit ()) {
1362+ Insts.push_back (LoongArchAsmParser::Inst (
1363+ LoongArch::LU32I_D, LoongArchMCExpr::VK_LoongArch_TLS_DESC64_LO20));
1364+ Insts.push_back (LoongArchAsmParser::Inst (
1365+ LoongArch::LU52I_D, LoongArchMCExpr::VK_LoongArch_TLS_DESC64_HI12));
1366+ }
12641367
1265- emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
1266- }
1368+ Insts.push_back (LoongArchAsmParser::Inst (
1369+ LD, LoongArchMCExpr::VK_LoongArch_TLS_DESC_LD));
1370+ Insts.push_back (LoongArchAsmParser::Inst (
1371+ LoongArch::JIRL, LoongArchMCExpr::VK_LoongArch_TLS_DESC_CALL));
1372+
1373+ emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
1374+ return ;
1375+ }
12671376
1268- void LoongArchAsmParser::emitLoadAddressTLSDescPcrel (MCInst &Inst, SMLoc IDLoc,
1269- MCStreamer &Out) {
1270- // la.tls.desc $rd, sym
12711377 // expands to:
12721378 // pcalau12i $rd, %desc_pc_hi20(sym)
12731379 // addi.w/d $rd, $rd, %desc_pc_lo12(sym)
12741380 // ld.w/d $ra, $rd, %desc_ld(sym)
12751381 // jirl $ra, $ra, %desc_call(sym)
1276- MCRegister DestReg = Inst.getOperand (0 ).getReg ();
1277- const MCExpr *Symbol = Inst.getOperand (1 ).getExpr ();
1278- unsigned ADDI = is64Bit () ? LoongArch::ADDI_D : LoongArch::ADDI_W;
1279- unsigned LD = is64Bit () ? LoongArch::LD_D : LoongArch::LD_W;
1280- InstSeq Insts;
1281-
12821382 Insts.push_back (LoongArchAsmParser::Inst (
12831383 LoongArch::PCALAU12I, LoongArchMCExpr::VK_LoongArch_TLS_DESC_PC_HI20));
12841384 Insts.push_back (LoongArchAsmParser::Inst (
@@ -1291,9 +1391,8 @@ void LoongArchAsmParser::emitLoadAddressTLSDescPcrel(MCInst &Inst, SMLoc IDLoc,
12911391 emitLAInstSeq (DestReg, DestReg, Symbol, Insts, IDLoc, Out);
12921392}
12931393
1294- void LoongArchAsmParser::emitLoadAddressTLSDescPcrelLarge (MCInst &Inst,
1295- SMLoc IDLoc,
1296- MCStreamer &Out) {
1394+ void LoongArchAsmParser::emitLoadAddressTLSDescLarge (MCInst &Inst, SMLoc IDLoc,
1395+ MCStreamer &Out) {
12971396 // la.tls.desc $rd, $rj, sym
12981397 // expands to:
12991398 // pcalau12i $rd, %desc_pc_hi20(sym)
@@ -1438,15 +1537,11 @@ bool LoongArchAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
14381537 case LoongArch::PseudoLA_TLS_GD_LARGE:
14391538 emitLoadAddressTLSGDLarge (Inst, IDLoc, Out);
14401539 return false ;
1441- case LoongArch::PseudoLA_TLS_DESC_ABS:
1442- case LoongArch::PseudoLA_TLS_DESC_ABS_LARGE:
1443- emitLoadAddressTLSDescAbs (Inst, IDLoc, Out);
1444- return false ;
1445- case LoongArch::PseudoLA_TLS_DESC_PC:
1446- emitLoadAddressTLSDescPcrel (Inst, IDLoc, Out);
1540+ case LoongArch::PseudoLA_TLS_DESC:
1541+ emitLoadAddressTLSDesc (Inst, IDLoc, Out);
14471542 return false ;
1448- case LoongArch::PseudoLA_TLS_DESC_PC_LARGE :
1449- emitLoadAddressTLSDescPcrelLarge (Inst, IDLoc, Out);
1543+ case LoongArch::PseudoLA_TLS_DESC_LARGE :
1544+ emitLoadAddressTLSDescLarge (Inst, IDLoc, Out);
14501545 return false ;
14511546 case LoongArch::PseudoLI_W:
14521547 case LoongArch::PseudoLI_D:
@@ -1475,10 +1570,8 @@ unsigned LoongArchAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
14751570 return Match_RequiresAMORdDifferRkRj;
14761571 }
14771572 break ;
1478- case LoongArch::PseudoLA_TLS_DESC_ABS:
1479- case LoongArch::PseudoLA_TLS_DESC_ABS_LARGE:
1480- case LoongArch::PseudoLA_TLS_DESC_PC:
1481- case LoongArch::PseudoLA_TLS_DESC_PC_LARGE: {
1573+ case LoongArch::PseudoLA_TLS_DESC:
1574+ case LoongArch::PseudoLA_TLS_DESC_LARGE: {
14821575 MCRegister Rd = Inst.getOperand (0 ).getReg ();
14831576 if (Rd != LoongArch::R4)
14841577 return Match_RequiresLAORdR4;
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