@@ -2416,8 +2416,9 @@ unsigned RISCVTargetLowering::getSubregIndexByMVT(MVT VT, unsigned Index) {
24162416unsigned RISCVTargetLowering::getRegClassIDForVecVT(MVT VT) {
24172417 if (VT.isRISCVVectorTuple()) {
24182418 unsigned NF = VT.getRISCVVectorTupleNumFields();
2419- unsigned RegsPerField = std::max(1U, (unsigned)VT.getSizeInBits() /
2420- (NF * RISCV::RVVBitsPerBlock));
2419+ unsigned RegsPerField =
2420+ std::max(1U, (unsigned)VT.getSizeInBits().getKnownMinValue() /
2421+ (NF * RISCV::RVVBitsPerBlock));
24212422 switch (RegsPerField) {
24222423 case 1:
24232424 if (NF == 2)
@@ -7006,7 +7007,7 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
70067007 SDLoc DL(Op);
70077008 MVT XLenVT = Subtarget.getXLenVT();
70087009 unsigned NF = VecTy.getRISCVVectorTupleNumFields();
7009- unsigned Sz = VecTy.getSizeInBits();
7010+ unsigned Sz = VecTy.getSizeInBits().getKnownMinValue() ;
70107011 unsigned NumElts = Sz / (NF * 8);
70117012 int Log2LMUL = Log2_64(NumElts) - 3;
70127013
@@ -7049,7 +7050,7 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
70497050 SDLoc DL(Op);
70507051 MVT XLenVT = Subtarget.getXLenVT();
70517052 unsigned NF = VecTy.getRISCVVectorTupleNumFields();
7052- unsigned Sz = VecTy.getSizeInBits();
7053+ unsigned Sz = VecTy.getSizeInBits().getKnownMinValue() ;
70537054 unsigned NumElts = Sz / (NF * 8);
70547055 int Log2LMUL = Log2_64(NumElts) - 3;
70557056
@@ -21309,6 +21310,25 @@ bool RISCVTargetLowering::splitValueIntoRegisterParts(
2130921310 return true;
2131021311 }
2131121312
21313+ if (ValueVT.isRISCVVectorTuple() && PartVT.isRISCVVectorTuple()) {
21314+ unsigned ValNF = ValueVT.getRISCVVectorTupleNumFields();
21315+ [[maybe_unused]] unsigned ValLMUL =
21316+ divideCeil(ValueVT.getSizeInBits().getKnownMinValue(),
21317+ ValNF * RISCV::RVVBitsPerBlock);
21318+ unsigned PartNF = PartVT.getRISCVVectorTupleNumFields();
21319+ [[maybe_unused]] unsigned PartLMUL =
21320+ divideCeil(PartVT.getSizeInBits().getKnownMinValue(),
21321+ PartNF * RISCV::RVVBitsPerBlock);
21322+ assert(ValNF == PartNF && ValLMUL == PartLMUL &&
21323+ "RISC-V vector tuple type only accepts same register class type "
21324+ "TUPLE_INSERT");
21325+
21326+ Val = DAG.getNode(RISCVISD::TUPLE_INSERT, DL, PartVT, DAG.getUNDEF(PartVT),
21327+ Val, DAG.getVectorIdxConstant(0, DL));
21328+ Parts[0] = Val;
21329+ return true;
21330+ }
21331+
2131221332 if (ValueVT.isScalableVector() && PartVT.isScalableVector()) {
2131321333 LLVMContext &Context = *DAG.getContext();
2131421334 EVT ValueEltVT = ValueVT.getVectorElementType();
@@ -21344,22 +21364,6 @@ bool RISCVTargetLowering::splitValueIntoRegisterParts(
2134421364 }
2134521365 }
2134621366
21347- if (ValueVT.isRISCVVectorTuple() && PartVT.isRISCVVectorTuple()) {
21348- unsigned ValNF = ValueVT.getRISCVVectorTupleNumFields();
21349- [[maybe_unused]] unsigned ValLMUL =
21350- divideCeil(ValueVT.getSizeInBits(), ValNF * RISCV::RVVBitsPerBlock);
21351- unsigned PartNF = PartVT.getRISCVVectorTupleNumFields();
21352- [[maybe_unused]] unsigned PartLMUL =
21353- divideCeil(PartVT.getSizeInBits(), PartNF * RISCV::RVVBitsPerBlock);
21354- assert(ValNF == PartNF && ValLMUL == PartLMUL &&
21355- "RISC-V vector tuple type only accepts same register class type "
21356- "TUPLE_INSERT");
21357-
21358- Val = DAG.getNode(RISCVISD::TUPLE_INSERT, DL, PartVT, DAG.getUNDEF(PartVT),
21359- Val, DAG.getVectorIdxConstant(0, DL));
21360- Parts[0] = Val;
21361- return true;
21362- }
2136321367 return false;
2136421368}
2136521369
@@ -21378,6 +21382,9 @@ SDValue RISCVTargetLowering::joinRegisterPartsIntoValue(
2137821382 return Val;
2137921383 }
2138021384
21385+ if (ValueVT.isRISCVVectorTuple())
21386+ return SDValue();
21387+
2138121388 if (ValueVT.isScalableVector() && PartVT.isScalableVector()) {
2138221389 LLVMContext &Context = *DAG.getContext();
2138321390 SDValue Val = Parts[0];
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