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1 parent e378890 commit b01686aCopy full SHA for b01686a
mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
@@ -908,7 +908,6 @@ void mlir::vector::populateVectorLinearizeShuffleLikeOpsPatterns(
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[=](vector::InsertStridedSliceOp op) -> bool {
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if (isLessThanTargetBitWidth(op, targetBitWidth)) {
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auto srcTy = op.getSourceVectorType();
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- auto dstTy = op.getDestVectorType();
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if (!op.hasNonUnitStrides() && srcTy.getRank() == 2)
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return false;
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}
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