@@ -45,6 +45,13 @@ using namespace llvm;
4545#define GET_REGINFO_MC_DESC
4646#include " MipsGenRegisterInfo.inc"
4747
48+ namespace {
49+ class MipsWinCOFFTargetStreamer : public MipsTargetStreamer {
50+ public:
51+ MipsWinCOFFTargetStreamer (MCStreamer &S) : MipsTargetStreamer(S) {}
52+ };
53+ } // end namespace
54+
4855// / Select the Mips CPU for the given triple and cpu name.
4956StringRef MIPS_MC::selectMipsCPU (const Triple &TT, StringRef CPU) {
5057 if (CPU.empty () || CPU == " generic" ) {
@@ -84,7 +91,14 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT,
8491static MCAsmInfo *createMipsMCAsmInfo (const MCRegisterInfo &MRI,
8592 const Triple &TT,
8693 const MCTargetOptions &Options) {
87- MCAsmInfo *MAI = new MipsELFMCAsmInfo (TT, Options);
94+ MCAsmInfo *MAI;
95+
96+ if (TT.isWindowsMSVCEnvironment ())
97+ MAI = new MipsCOFFMCAsmInfoMicrosoft ();
98+ else if (TT.isOSWindows ())
99+ MAI = new MipsCOFFMCAsmInfoGNU ();
100+ else
101+ MAI = new MipsELFMCAsmInfo (TT, Options);
88102
89103 unsigned SP = MRI.getDwarfRegNum (Mips::SP, true );
90104 MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister (nullptr , SP);
@@ -127,6 +141,8 @@ static MCTargetStreamer *createMipsNullTargetStreamer(MCStreamer &S) {
127141
128142static MCTargetStreamer *
129143createMipsObjectTargetStreamer (MCStreamer &S, const MCSubtargetInfo &STI) {
144+ if (STI.getTargetTriple ().isOSBinFormatCOFF ())
145+ return new MipsWinCOFFTargetStreamer (S);
130146 return new MipsTargetELFStreamer (S, STI);
131147}
132148
@@ -186,6 +202,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC() {
186202 TargetRegistry::RegisterNullTargetStreamer (*T,
187203 createMipsNullTargetStreamer);
188204
205+ TargetRegistry::RegisterCOFFStreamer (*T, createMipsWinCOFFStreamer);
206+
189207 // Register the MC subtarget info.
190208 TargetRegistry::RegisterMCSubtargetInfo (*T, createMipsMCSubtargetInfo);
191209
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