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[AMDGPU] Optimize image sample followed by llvm.amdgcn.cvt.pkrtz into d16 variant
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‎llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -247,6 +247,42 @@ simplifyAMDGCNImageIntrinsic(const GCNSubtarget *ST,
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ArgTys[0] = User->getType();
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});
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}
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// Fold image.sample + cvt.pkrtz -> extractelement idx0 into a single
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// d16 image sample.
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// Pattern to match:
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// %sample = call float @llvm.amdgcn.image.sample...
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// %pack = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %sample,
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// float %any)
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// %low = extractelement <2 x half> %pack, i64 0
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// Replacement:
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// call half @llvm.amdgcn.image.sample
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//
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// Folding criteria:
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// 1. The only user of the image.sample intrinsic is amdgcn.cvt.pkrtz.
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// 2. That cvt.pkrtz call has exactly one use.
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// 3. Its sole user is an extractelement instruction with index zero.
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// Otherwise, folding is not performed, because D16 sampling only
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// guarantees that the element at index 0 is defined; index 1 is
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// undefined and using it will result in poison.
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if (auto *CvtPkrtzCall = dyn_cast<CallInst>(User)) {
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if (CvtPkrtzCall->getIntrinsicID() == Intrinsic::amdgcn_cvt_pkrtz &&
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CvtPkrtzCall->hasOneUse()) {
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// Unique use must be extractelement idx == 0
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if (auto *Ext =
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dyn_cast<ExtractElementInst>(*CvtPkrtzCall->user_begin())) {
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if (isa<ConstantInt>(Ext->getIndexOperand()) &&
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cast<ConstantInt>(Ext->getIndexOperand())->isZero()) {
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return modifyIntrinsicCall(
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II, *CvtPkrtzCall, ImageDimIntr->Intr, IC,
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[&](auto &Args, auto &ArgTys) {
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ArgTys[0] = CvtPkrtzCall->getType();
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});
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}
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}
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}
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}
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}
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// Only perform D16 folding if every user of the image sample is

‎llvm/test/Transforms/InstCombine/AMDGPU/image-d16.ll

Lines changed: 134 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -239,6 +239,140 @@ main_body:
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ret bfloat %res
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}
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define amdgpu_ps float @image_sample_2d_single_pkrtz_to_d16(<8 x i32> %surf_desc, <4 x i32> %samp, float %u, float %v) {
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; GFX7-LABEL: @image_sample_2d_single_pkrtz_to_d16(
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; GFX7-NEXT: main_body:
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; GFX7-NEXT: [[SAMPLE:%.*]] = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float [[U:%.*]], float [[V:%.*]], <8 x i32> [[SURF_DESC:%.*]], <4 x i32> [[SAMP:%.*]], i1 false, i32 0, i32 0)
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; GFX7-NEXT: [[PACK:%.*]] = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float [[SAMPLE]], float 0.000000e+00)
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; GFX7-NEXT: [[H0:%.*]] = extractelement <2 x half> [[PACK]], i64 0
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; GFX7-NEXT: [[MUL:%.*]] = fmul reassoc arcp contract afn half [[H0]], [[H0]]
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; GFX7-NEXT: [[DIV:%.*]] = fdiv reassoc arcp contract afn half [[MUL]], [[H0]]
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; GFX7-NEXT: [[ADD:%.*]] = fadd reassoc arcp contract afn half [[DIV]], [[H0]]
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; GFX7-NEXT: [[RES:%.*]] = fpext half [[ADD]] to float
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; GFX7-NEXT: ret float [[RES]]
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;
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; GFX81PLUS-LABEL: @image_sample_2d_single_pkrtz_to_d16(
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; GFX81PLUS-NEXT: main_body:
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; GFX81PLUS-NEXT: [[SAMPLE:%.*]] = call half @llvm.amdgcn.image.sample.lz.2d.f16.f32.v8i32.v4i32(i32 1, float [[U:%.*]], float [[V:%.*]], <8 x i32> [[SURF_DESC:%.*]], <4 x i32> [[SAMP:%.*]], i1 false, i32 0, i32 0)
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; GFX81PLUS-NEXT: [[MUL:%.*]] = fmul reassoc arcp contract afn half [[SAMPLE]], [[SAMPLE]]
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; GFX81PLUS-NEXT: [[DIV:%.*]] = fdiv reassoc arcp contract afn half [[MUL]], [[SAMPLE]]
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; GFX81PLUS-NEXT: [[ADD:%.*]] = fadd reassoc arcp contract afn half [[DIV]], [[SAMPLE]]
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; GFX81PLUS-NEXT: [[RES:%.*]] = fpext half [[ADD]] to float
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; GFX81PLUS-NEXT: ret float [[RES]]
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;
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main_body:
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%sample = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float %u, float %v, <8 x i32> %surf_desc, <4 x i32> %samp, i1 false, i32 0, i32 0)
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%pack = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %sample, float 0.000000e+00)
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%h0 = extractelement <2 x half> %pack, i64 0
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%mul = fmul reassoc arcp contract afn half %h0, %h0
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%div = fdiv reassoc arcp contract afn half %mul, %h0
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%add = fadd reassoc arcp contract afn half %div, %h0
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%res = fpext half %add to float
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ret float %res
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}
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define amdgpu_ps float @image_sample_2d_pkrtz_variable_no_d16(<8 x i32> %surf_desc, <4 x i32> %samp, float %u, float %v) {
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; GFX7-LABEL: @image_sample_2d_pkrtz_variable_no_d16(
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; GFX7-NEXT: main_body:
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; GFX7-NEXT: [[SAMPLE:%.*]] = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float [[U:%.*]], float [[V:%.*]], <8 x i32> [[SURF_DESC:%.*]], <4 x i32> [[SAMP:%.*]], i1 false, i32 0, i32 0)
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; GFX7-NEXT: [[PACK:%.*]] = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float [[SAMPLE]], float [[V]])
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; GFX7-NEXT: [[H0:%.*]] = extractelement <2 x half> [[PACK]], i64 0
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; GFX7-NEXT: [[H1:%.*]] = extractelement <2 x half> [[PACK]], i64 1
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; GFX7-NEXT: [[MUL:%.*]] = fmul half [[H0]], [[H1]]
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; GFX7-NEXT: [[ADD:%.*]] = fadd half [[MUL]], [[H0]]
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; GFX7-NEXT: [[RES:%.*]] = fpext half [[ADD]] to float
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; GFX7-NEXT: ret float [[RES]]
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;
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; GFX81PLUS-LABEL: @image_sample_2d_pkrtz_variable_no_d16(
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; GFX81PLUS-NEXT: main_body:
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; GFX81PLUS-NEXT: [[SAMPLE:%.*]] = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float [[U:%.*]], float [[V:%.*]], <8 x i32> [[SURF_DESC:%.*]], <4 x i32> [[SAMP:%.*]], i1 false, i32 0, i32 0)
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; GFX81PLUS-NEXT: [[PACK:%.*]] = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float [[SAMPLE]], float [[V]])
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; GFX81PLUS-NEXT: [[H0:%.*]] = extractelement <2 x half> [[PACK]], i64 0
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; GFX81PLUS-NEXT: [[H1:%.*]] = extractelement <2 x half> [[PACK]], i64 1
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; GFX81PLUS-NEXT: [[MUL:%.*]] = fmul half [[H0]], [[H1]]
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; GFX81PLUS-NEXT: [[ADD:%.*]] = fadd half [[MUL]], [[H0]]
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; GFX81PLUS-NEXT: [[RES:%.*]] = fpext half [[ADD]] to float
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; GFX81PLUS-NEXT: ret float [[RES]]
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;
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main_body:
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%sample = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float %u, float %v, <8 x i32> %surf_desc, <4 x i32> %samp, i1 false, i32 0, i32 0)
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%pack = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %sample, float %v)
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%h0 = extractelement <2 x half> %pack, i64 0
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%h1 = extractelement <2 x half> %pack, i64 1
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%mul = fmul half %h0, %h1
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%add = fadd half %mul, %h0
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%res = fpext half %add to float
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ret float %res
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}
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define amdgpu_ps float @image_sample_2d_pkrtz_constant_no_fold(<8 x i32> %surf_desc, <4 x i32> %samp, float %u, float %v) {
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; GFX7-LABEL: @image_sample_2d_pkrtz_constant_no_fold(
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; GFX7-NEXT: main_body:
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; GFX7-NEXT: [[SAMPLE:%.*]] = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float [[U:%.*]], float [[V:%.*]], <8 x i32> [[SURF_DESC:%.*]], <4 x i32> [[SAMP:%.*]], i1 false, i32 0, i32 0)
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; GFX7-NEXT: [[PACK:%.*]] = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float [[SAMPLE]], float 0.000000e+00)
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; GFX7-NEXT: [[H0:%.*]] = extractelement <2 x half> [[PACK]], i64 0
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; GFX7-NEXT: [[H1:%.*]] = extractelement <2 x half> [[PACK]], i64 1
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; GFX7-NEXT: [[MUL:%.*]] = fmul half [[H0]], [[H1]]
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; GFX7-NEXT: [[ADD:%.*]] = fadd half [[MUL]], [[H0]]
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; GFX7-NEXT: [[RES:%.*]] = fpext half [[ADD]] to float
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; GFX7-NEXT: ret float [[RES]]
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;
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; GFX81PLUS-LABEL: @image_sample_2d_pkrtz_constant_no_fold(
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; GFX81PLUS-NEXT: main_body:
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; GFX81PLUS-NEXT: [[SAMPLE:%.*]] = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float [[U:%.*]], float [[V:%.*]], <8 x i32> [[SURF_DESC:%.*]], <4 x i32> [[SAMP:%.*]], i1 false, i32 0, i32 0)
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; GFX81PLUS-NEXT: [[PACK:%.*]] = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float [[SAMPLE]], float 0.000000e+00)
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; GFX81PLUS-NEXT: [[H0:%.*]] = extractelement <2 x half> [[PACK]], i64 0
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; GFX81PLUS-NEXT: [[H1:%.*]] = extractelement <2 x half> [[PACK]], i64 1
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; GFX81PLUS-NEXT: [[MUL:%.*]] = fmul half [[H0]], [[H1]]
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; GFX81PLUS-NEXT: [[ADD:%.*]] = fadd half [[MUL]], [[H0]]
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; GFX81PLUS-NEXT: [[RES:%.*]] = fpext half [[ADD]] to float
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; GFX81PLUS-NEXT: ret float [[RES]]
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;
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main_body:
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%sample = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float %u, float %v, <8 x i32> %surf_desc, <4 x i32> %samp, i1 false, i32 0, i32 0)
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%pack = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %sample, float 0.000000e+00)
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%h0 = extractelement <2 x half> %pack, i64 0
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%h1 = extractelement <2 x half> %pack, i64 1
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%mul = fmul half %h0, %h1
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%add = fadd half %mul, %h0
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%res = fpext half %add to float
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ret float %res
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}
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define amdgpu_ps float @image_sample_2d_single_pkrtz_high_no_d16(<8 x i32> %surf_desc, <4 x i32> %samp, float %u, float %v) {
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; GFX7-LABEL: @image_sample_2d_single_pkrtz_high_no_d16(
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; GFX7-NEXT: main_body:
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; GFX7-NEXT: [[SAMPLE:%.*]] = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float [[U:%.*]], float [[V:%.*]], <8 x i32> [[SURF_DESC:%.*]], <4 x i32> [[SAMP:%.*]], i1 false, i32 0, i32 0)
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; GFX7-NEXT: [[PACK:%.*]] = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float 0.000000e+00, float [[SAMPLE]])
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; GFX7-NEXT: [[H0:%.*]] = extractelement <2 x half> [[PACK]], i64 1
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; GFX7-NEXT: [[MUL:%.*]] = fmul reassoc arcp contract afn half [[H0]], [[H0]]
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; GFX7-NEXT: [[DIV:%.*]] = fdiv reassoc arcp contract afn half [[MUL]], [[H0]]
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; GFX7-NEXT: [[ADD:%.*]] = fadd reassoc arcp contract afn half [[DIV]], [[H0]]
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; GFX7-NEXT: [[RES:%.*]] = fpext half [[ADD]] to float
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; GFX7-NEXT: ret float [[RES]]
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;
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; GFX81PLUS-LABEL: @image_sample_2d_single_pkrtz_high_no_d16(
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; GFX81PLUS-NEXT: main_body:
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; GFX81PLUS-NEXT: [[SAMPLE:%.*]] = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float [[U:%.*]], float [[V:%.*]], <8 x i32> [[SURF_DESC:%.*]], <4 x i32> [[SAMP:%.*]], i1 false, i32 0, i32 0)
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; GFX81PLUS-NEXT: [[PACK:%.*]] = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float 0.000000e+00, float [[SAMPLE]])
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; GFX81PLUS-NEXT: [[H0:%.*]] = extractelement <2 x half> [[PACK]], i64 1
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; GFX81PLUS-NEXT: [[MUL:%.*]] = fmul reassoc arcp contract afn half [[H0]], [[H0]]
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; GFX81PLUS-NEXT: [[DIV:%.*]] = fdiv reassoc arcp contract afn half [[MUL]], [[H0]]
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; GFX81PLUS-NEXT: [[ADD:%.*]] = fadd reassoc arcp contract afn half [[DIV]], [[H0]]
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; GFX81PLUS-NEXT: [[RES:%.*]] = fpext half [[ADD]] to float
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; GFX81PLUS-NEXT: ret float [[RES]]
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;
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main_body:
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%sample = call float @llvm.amdgcn.image.sample.lz.2d.f32.f32.v8i32.v4i32(i32 1, float %u, float %v, <8 x i32> %surf_desc, <4 x i32> %samp, i1 false, i32 0, i32 0)
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%pack = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float 0.000000e+00, float %sample)
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%h0 = extractelement <2 x half> %pack, i64 1
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%mul = fmul reassoc arcp contract afn half %h0, %h0
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%div = fdiv reassoc arcp contract afn half %mul, %h0
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%add = fadd reassoc arcp contract afn half %div, %h0
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%res = fpext half %add to float
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ret float %res
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}
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define amdgpu_ps half @image_gather4_2d_v4f32(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %s, half %t) {
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; GFX7-LABEL: @image_gather4_2d_v4f32(
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; GFX7-NEXT: main_body:

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