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llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll

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@@ -82,6 +82,22 @@ define <vscale x 4 x i32> @diff_avl_vlmax(<vscale x 4 x i32> %passthru, <vscale
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @diff_avl_non_uimm5(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
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; CHECK-LABEL: diff_avl_non_uimm5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a0, 42
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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; CHECK-NEXT: vmv2r.v v14, v8
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; CHECK-NEXT: vadd.vv v14, v10, v12
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; CHECK-NEXT: li a0, 123
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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; CHECK-NEXT: vmv.v.v v8, v14
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 42)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen 123)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @vadd_mask_ma(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %mask, iXLen %vl) {
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; CHECK-LABEL: vadd_mask_ma:
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; CHECK: # %bb.0:

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