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[AMDGPU] Pre-commit test for #169213 (NFC)
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llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir

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Original file line numberDiff line numberDiff line change
@@ -54,6 +54,9 @@
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define amdgpu_gs void @mask_hazard_valu_vcmp_sgpr() { ret void }
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define amdgpu_gs void @mask_hazard_combine1() { ret void }
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define amdgpu_gs void @mask_hazard_combine2() { ret void }
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define amdgpu_gs void @mask_hazard_combine3() { ret void }
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define amdgpu_gs void @mask_hazard_combine4() { ret void }
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define amdgpu_gs void @mask_hazard_combine5() { ret void }
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...
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---
@@ -1041,3 +1044,108 @@ body: |
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$sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $vgpr5, implicit $exec
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S_ENDPGM 0
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...
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---
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name: mask_hazard_combine3
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body: |
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bb.0:
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; GFX11-LABEL: name: mask_hazard_combine3
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; GFX11: $vgpr3 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
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; GFX11-NEXT: $vgpr4 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
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; GFX11-NEXT: $vgpr5 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
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; GFX11-NEXT: V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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; GFX11-NEXT: S_WAITCNT_DEPCTR 65533
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; GFX11-NEXT: $sgpr0_sgpr1 = V_CMP_EQ_U32_e64 2, $sgpr10, implicit $exec
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; GFX11-NEXT: S_WAITCNT_DEPCTR 61951
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; GFX11-NEXT: $sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $sgpr10, implicit $exec
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; GFX11-NEXT: S_WAITCNT_DEPCTR 61951
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; GFX11-NEXT: S_ENDPGM 0
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;
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; GFX12-LABEL: name: mask_hazard_combine3
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; GFX12: $vgpr3 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
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; GFX12-NEXT: $vgpr4 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
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; GFX12-NEXT: $vgpr5 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
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; GFX12-NEXT: V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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; GFX12-NEXT: $sgpr0_sgpr1 = V_CMP_EQ_U32_e64 2, $sgpr10, implicit $exec
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; GFX12-NEXT: $sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $sgpr10, implicit $exec
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; GFX12-NEXT: S_ENDPGM 0
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$vgpr3 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
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$vgpr4 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
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$vgpr5 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
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V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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$sgpr0_sgpr1 = V_CMP_EQ_U32_e64 2, $sgpr10, implicit $exec
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$sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $sgpr10, implicit $exec
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S_ENDPGM 0
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...
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---
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name: mask_hazard_combine4
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body: |
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bb.0:
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; GFX11-LABEL: name: mask_hazard_combine4
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; GFX11: $vgpr3 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
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; GFX11-NEXT: $vgpr4 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
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; GFX11-NEXT: $vgpr5 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
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; GFX11-NEXT: V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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; GFX11-NEXT: S_WAITCNT_DEPCTR 65533
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; GFX11-NEXT: $sgpr0_sgpr1 = V_CMP_EQ_U32_e64 2, $sgpr10, implicit $exec
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; GFX11-NEXT: S_WAITCNT_DEPCTR 61951
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; GFX11-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $vcc
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; GFX11-NEXT: $sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $sgpr10, implicit $exec
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; GFX11-NEXT: S_WAITCNT_DEPCTR 61951
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; GFX11-NEXT: S_ENDPGM 0
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;
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; GFX12-LABEL: name: mask_hazard_combine4
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; GFX12: $vgpr3 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
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; GFX12-NEXT: $vgpr4 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
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; GFX12-NEXT: $vgpr5 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
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; GFX12-NEXT: V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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; GFX12-NEXT: $sgpr0_sgpr1 = V_CMP_EQ_U32_e64 2, $sgpr10, implicit $exec
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; GFX12-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $vcc
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; GFX12-NEXT: $sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $sgpr10, implicit $exec
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; GFX12-NEXT: S_ENDPGM 0
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$vgpr3 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
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$vgpr4 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
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$vgpr5 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
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V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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$sgpr0_sgpr1 = V_CMP_EQ_U32_e64 2, $sgpr10, implicit $exec
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$sgpr4_sgpr5 = S_MOV_B64 $vcc
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$sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $sgpr10, implicit $exec
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S_ENDPGM 0
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...
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---
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name: mask_hazard_combine5
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body: |
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bb.0:
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; GFX11-LABEL: name: mask_hazard_combine5
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; GFX11: $vgpr3 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
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; GFX11-NEXT: $vgpr4 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
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; GFX11-NEXT: $vgpr5 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
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; GFX11-NEXT: V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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; GFX11-NEXT: S_WAITCNT_DEPCTR 65533
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; GFX11-NEXT: $sgpr0_sgpr1 = V_CMP_EQ_U32_e64 2, $sgpr10, implicit $exec
1128+
; GFX11-NEXT: S_WAITCNT_DEPCTR 61951
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; GFX11-NEXT: $sgpr5 = S_MOV_B32 $sgpr1
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; GFX11-NEXT: $sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $sgpr10, implicit $exec
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; GFX11-NEXT: S_WAITCNT_DEPCTR 61951
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; GFX11-NEXT: S_ENDPGM 0
1133+
;
1134+
; GFX12-LABEL: name: mask_hazard_combine5
1135+
; GFX12: $vgpr3 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
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; GFX12-NEXT: $vgpr4 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
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; GFX12-NEXT: $vgpr5 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
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; GFX12-NEXT: V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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; GFX12-NEXT: $sgpr0_sgpr1 = V_CMP_EQ_U32_e64 2, $sgpr10, implicit $exec
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; GFX12-NEXT: $sgpr5 = S_MOV_B32 $sgpr1
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; GFX12-NEXT: $sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $sgpr10, implicit $exec
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; GFX12-NEXT: S_ENDPGM 0
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$vgpr3 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
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$vgpr4 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
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$vgpr5 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
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V_CMP_NE_U32_e32 0, $vgpr5, implicit-def $vcc, implicit $exec
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$sgpr0_sgpr1 = V_CMP_EQ_U32_e64 2, $sgpr10, implicit $exec
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$sgpr5 = S_MOV_B32 $sgpr1
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$sgpr2_sgpr3 = V_CMP_EQ_U32_e64 3, $sgpr10, implicit $exec
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S_ENDPGM 0
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...

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