Skip to content

Commit b15d15e

Browse files
mikhailramalhomikhailramalho
committed
Fix vfwmul occ
Signed-off-by: Mikhail R. Gadelha <[email protected]>
1 parent b206ab3 commit b15d15e

File tree

2 files changed

+8
-8
lines changed

2 files changed

+8
-8
lines changed

‎llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -668,7 +668,7 @@ foreach mx = SchedMxListFW in {
668668

669669
// Slightly increased latency for SEW == 32
670670
defvar VFWMullOcc = !if(!eq(sew, 32),
671-
!add(ConstValueUntilLMULThenDouble<"M2", 2, mx>.c, 1), // 1/3/5/9
671+
GetLMULValue<[1, 1, 1, 3, 5, 9, 18], mx>.c,
672672
ConstOneUntilMF2ThenDouble<mx>.c
673673
);
674674
defvar VFWMulVLat = ConstValueUntilLMULThenDoubleBase<"M8", 5, 8, mx>.c;

‎llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fp.s‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3671,13 +3671,13 @@ vfwsub.wv v8, v16, v24
36713671
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
36723672
# CHECK-NEXT: 1 5 8.00 5 SMX60_VFP[8] VFWMUL_VV vfwmul.vv v8, v16, v24
36733673
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
3674-
# CHECK-NEXT: 1 5 3.00 5 SMX60_VFP[3] VFWMUL_VV vfwmul.vv v8, v16, v24
3674+
# CHECK-NEXT: 1 5 1.00 5 SMX60_VFP VFWMUL_VV vfwmul.vv v8, v16, v24
36753675
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
36763676
# CHECK-NEXT: 1 5 3.00 5 SMX60_VFP[3] VFWMUL_VV vfwmul.vv v8, v16, v24
36773677
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
3678-
# CHECK-NEXT: 1 5 3.00 5 SMX60_VFP[3] VFWMUL_VV vfwmul.vv v8, v16, v24
3679-
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
36803678
# CHECK-NEXT: 1 5 5.00 5 SMX60_VFP[5] VFWMUL_VV vfwmul.vv v8, v16, v24
3679+
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
3680+
# CHECK-NEXT: 1 5 9.00 5 SMX60_VFP[9] VFWMUL_VV vfwmul.vv v8, v16, v24
36813681
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
36823682
# CHECK-NEXT: 1 5 2.00 5 SMX60_VFP[2] VFWSUB_VF vfwsub.vf v8, v16, ft0
36833683
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -3763,7 +3763,7 @@ vfwsub.wv v8, v16, v24
37633763

37643764
# CHECK: Resource pressure per iteration:
37653765
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
3766-
# CHECK-NEXT: - 915.00 - - - 8888.00 30.00 -
3766+
# CHECK-NEXT: - 915.00 - - - 8892.00 30.00 -
37673767

37683768
# CHECK: Resource pressure by instruction:
37693769
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
@@ -5518,13 +5518,13 @@ vfwsub.wv v8, v16, v24
55185518
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
55195519
# CHECK-NEXT: - - - - - 8.00 - - vfwmul.vv v8, v16, v24
55205520
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
5521-
# CHECK-NEXT: - - - - - 3.00 - - vfwmul.vv v8, v16, v24
5521+
# CHECK-NEXT: - - - - - 1.00 - - vfwmul.vv v8, v16, v24
55225522
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
55235523
# CHECK-NEXT: - - - - - 3.00 - - vfwmul.vv v8, v16, v24
55245524
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
5525-
# CHECK-NEXT: - - - - - 3.00 - - vfwmul.vv v8, v16, v24
5526-
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
55275525
# CHECK-NEXT: - - - - - 5.00 - - vfwmul.vv v8, v16, v24
5526+
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
5527+
# CHECK-NEXT: - - - - - 9.00 - - vfwmul.vv v8, v16, v24
55285528
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
55295529
# CHECK-NEXT: - - - - - 2.00 - - vfwsub.vf v8, v16, ft0
55305530
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu

0 commit comments

Comments
 (0)