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SpencerAbsonSpencerAbson
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Remove ext dependencies and test armv9.6 driver behavior
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‎clang/test/Driver/aarch64-v96a.c‎

Lines changed: 39 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,14 +6,50 @@
66
// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s
77
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s
88
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A %s
9-
// GENERICV96A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"
9+
// GENERICV96A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+cmpbr"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p2"
1010

1111
// RUN: %clang -target aarch64_be -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
1212
// RUN: %clang -target aarch64_be -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
1313
// RUN: %clang -target aarch64 -mbig-endian -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
1414
// RUN: %clang -target aarch64 -mbig-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
1515
// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
1616
// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.6-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV96A-BE %s
17-
// GENERICV96A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"
18-
//
17+
// GENERICV96A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+cmpbr"{{.*}} "-target-feature" "+fprcvt"{{.*}} "-target-feature" "+sve2p2"
18+
1919
// ===== Features supported on aarch64 =====
20+
21+
// RUN: %clang -target aarch64 -march=armv9.6a+f8f16mm -### -c %s 2>&1 | FileCheck -check-prefix=V96A-F8F16MM %s
22+
// RUN: %clang -target aarch64 -march=armv9.6-a+f8f16mm -### -c %s 2>&1 | FileCheck -check-prefix=V96A-F8F16MM %s
23+
// V96A-F8F16MM: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+f8f16mm"
24+
25+
// RUN: %clang -target aarch64 -march=armv9.6a+f8f32mm -### -c %s 2>&1 | FileCheck -check-prefix=V96A-F8F32MM %s
26+
// RUN: %clang -target aarch64 -march=armv9.6-a+f8f32mm -### -c %s 2>&1 | FileCheck -check-prefix=V96A-F8F32MM %s
27+
// V96A-F8F32MM: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+f8f32mm"
28+
29+
// RUN: %clang -target aarch64 -march=armv9.6a+lsfe -### -c %s 2>&1 | FileCheck -check-prefix=V96A-LSFE %s
30+
// RUN: %clang -target aarch64 -march=armv9.6-a+lsfe -### -c %s 2>&1 | FileCheck -check-prefix=V96A-LSFE %s
31+
// V96A-LSFE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+lsfe"
32+
33+
// RUN: %clang -target aarch64 -march=armv9.6a+sme2p2 -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SME2p2 %s
34+
// RUN: %clang -target aarch64 -march=armv9.6-a+sme2p2 -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SME2p2 %s
35+
// V96A-SME2p2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+sme2p2"
36+
37+
// RUN: %clang -target aarch64 -march=armv9.6a+ssve-aes -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SSVE-AES %s
38+
// RUN: %clang -target aarch64 -march=armv9.6-a+ssve-aes -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SSVE-AES %s
39+
// V96A-SSVE-AES: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+ssve-aes"
40+
41+
// RUN: %clang -target aarch64 -march=armv9.6a+sve2p2 -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE2p2 %s
42+
// RUN: %clang -target aarch64 -march=armv9.6-a+sve2p2 -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE2p2 %s
43+
// V96A-SVE2p2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+sve2p2"
44+
45+
// RUN: %clang -target aarch64 -march=armv9.6a+sve-aes2 -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE-AES2 %s
46+
// RUN: %clang -target aarch64 -march=armv9.6-a+sve-aes2 -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE-AES2 %s
47+
// V96A-SVE-AES2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+sve-aes2"
48+
49+
// RUN: %clang -target aarch64 -march=armv9.6a+sve-bfscale -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE-BFSCALE %s
50+
// RUN: %clang -target aarch64 -march=armv9.6-a+sve-bfscale -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE-BFSCALE %s
51+
// V96A-SVE-BFSCALE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+sve-bfscale"
52+
53+
// RUN: %clang -target aarch64 -march=armv9.6a+sve-f16f32mm -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE-F16F32MM %s
54+
// RUN: %clang -target aarch64 -march=armv9.6-a+sve-f16f32mm -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE-F16F32MM %s
55+
// V96A-SVE-F16F32MM: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+sve-f16f32mm"

‎llvm/lib/Target/AArch64/AArch64Features.td‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -526,35 +526,35 @@ def FeatureCMPBR : ExtensionWithMArch<"cmpbr", "CMPBR", "FEAT_CMPBR",
526526
"Enable Armv9.6-A base compare and branch instructions">;
527527

528528
def FeatureF8F32MM: ExtensionWithMArch<"f8f32mm", "F8F32MM", "FEAT_F8F32MM",
529-
"Enable Armv9.6-A FP8 to Single-Precision Matrix Multiplication", [FeatureFP8DOT4]>;
529+
"Enable Armv9.6-A FP8 to Single-Precision Matrix Multiplication">;
530530

531531
def FeatureF8F16MM: ExtensionWithMArch<"f8f16mm", "F8F16MM", "FEAT_F8F16MM",
532-
"Enable Armv9.6-A FP8 to Half-Precision Matrix Multiplication", [FeatureFP8DOT2, FeatureF8F32MM]>;
532+
"Enable Armv9.6-A FP8 to Half-Precision Matrix Multiplication">;
533533

534534
def FeatureFPRCVT: ExtensionWithMArch<"fprcvt", "FPRCVT", "FEAT_FPRCVT",
535535
"Enable Armv9.6-A base convert instructions for SIMD&FP scalar register operands of"
536-
" different input and output sizes", [FeatureFPARMv8]>;
536+
" different input and output sizes">;
537537

538538
def FeatureLSFE : ExtensionWithMArch<"lsfe", "LSFE", "FEAT_LSFE",
539-
"Enable Armv9.6-A base Atomic floating-point in-memory instructions", [FeatureFPARMv8]>;
539+
"Enable Armv9.6-A base Atomic floating-point in-memory instructions">;
540540

541541
def FeatureSME2p2: ExtensionWithMArch<"sme2p2", "SME2p2", "FEAT_SME2p2",
542542
"Enable Armv9.6-A Scalable Matrix Extension 2.2 instructions", [FeatureSME2p1]>;
543543

544544
def FeatureSSVE_AES : ExtensionWithMArch<"ssve-aes", "SSVE_AES", "FEAT_SSVE_AES",
545-
"Enable Armv9.6-A SVE2 AES support in streaming SVE mode", [FeatureSME2p1]>;
545+
"Enable Armv9.6-A SVE2 AES support in streaming SVE mode">;
546546

547547
def FeatureSVE2p2 : ExtensionWithMArch<"sve2p2", "SVE2p2", "FEAT_SVE2p2",
548548
"Enable Armv9.6-A Scalable Vector Extension 2.2 instructions", [FeatureSVE2p1]>;
549549

550550
def FeatureSVEAES2: ExtensionWithMArch<"sve-aes2", "SVE_AES2", "FEAT_SVE_AES2",
551-
"Enable Armv9.6-A SVE multi-vector AES and 128-bit PMULL instructions", [FeatureSVE2AES]>;
551+
"Enable Armv9.6-A SVE multi-vector AES and 128-bit PMULL instructions">;
552552

553553
def FeatureSVEBFSCALE: ExtensionWithMArch<"sve-bfscale", "SVE_BFSCALE", "FEAT_SVE_BFSCALE",
554-
"Enable Armv9.6-A SVE BFloat16 scaling instructions", [FeatureSVEB16B16]>;
554+
"Enable Armv9.6-A SVE BFloat16 scaling instructions">;
555555

556556
def FeatureSVE_F16F32MM: ExtensionWithMArch<"sve-f16f32mm", "SVE_F16F32MM", "FEAT_SVE_F16F32MM",
557-
"Enable Armv9.6-A FP16 to FP32 Matrix Multiply instructions", [FeatureSVE2p1]>;
557+
"Enable Armv9.6-A FP16 to FP32 Matrix Multiply instructions">;
558558

559559
//===----------------------------------------------------------------------===//
560560
// Other Features

‎llvm/unittests/TargetParser/TargetParserTest.cpp‎

Lines changed: 5 additions & 78 deletions
Original file line numberDiff line numberDiff line change
@@ -1772,14 +1772,6 @@ AArch64ExtensionDependenciesBaseArchTestParams
17721772
{AArch64::ARMV8A, {"nofp", "jscvt"}, {"fp-armv8", "jsconv"}, {}},
17731773
{AArch64::ARMV8A, {"jscvt", "nofp"}, {}, {"fp-armv8", "jsconv"}},
17741774

1775-
// fp -> lsfe
1776-
{AArch64::ARMV9_6A, {"nofp", "lsfe"}, {"fp-armv8", "lsfe"}, {}},
1777-
{AArch64::ARMV9_6A, {"lsfe", "nofp"}, {}, {"fp-armv8", "lsfe"}},
1778-
1779-
// fp -> fprcvt
1780-
{AArch64::ARMV9_6A, {"nofp", "fprcvt"}, {"fp-armv8", "fprcvt"}, {}},
1781-
{AArch64::ARMV9_6A, {"fprcvt", "nofp"}, {}, {"fp-armv8", "fprcvt"}},
1782-
17831775
// simd -> {aes, sha2, sha3, sm4}
17841776
{AArch64::ARMV8A, {"nosimd", "aes"}, {"neon", "aes"}, {}},
17851777
{AArch64::ARMV8A, {"aes", "nosimd"}, {}, {"neon", "aes"}},
@@ -1832,47 +1824,20 @@ AArch64ExtensionDependenciesBaseArchTestParams
18321824
{AArch64::ARMV8A, {"nosve2", "sve2-sm4"}, {"sve2", "sve2-sm4"}, {}},
18331825
{AArch64::ARMV8A, {"sve2-sm4", "nosve2"}, {}, {"sve2", "sve2-sm4"}},
18341826

1835-
// sve-b16b16 -> {sme-b16b16, sve-bfscale}
1836-
{AArch64::ARMV8A,
1827+
// sve-b16b16 -> {sme-b16b16}
1828+
{AArch64::ARMV9_4A,
18371829
{"nosve-b16b16", "sme-b16b16"},
18381830
{"sve-b16b16", "sme-b16b16"},
18391831
{}},
1840-
{AArch64::ARMV9_6A,
1832+
{AArch64::ARMV9_4A,
18411833
{"sme-b16b16", "nosve-b16b16"},
18421834
{},
18431835
{"sve-b16b16", "sme-b16b16"}},
1844-
{AArch64::ARMV9_6A,
1845-
{"nosve-b16b16", "sve-bfscale"},
1846-
{"sve-b16b16", "sve-bfscale"},
1847-
{}},
1848-
{AArch64::ARMV9_6A,
1849-
{"sve-bfscale", "nosve-b16b16"},
1850-
{},
1851-
{"sve-b16b16", "sve-bfscale"}},
18521836

1853-
// sve2p1 -> {sve2p2, sve-f16f32mm}
1837+
// sve2p1 -> {sve2p2}
18541838
{AArch64::ARMV9_6A, {"nosve2p1", "sve2p2"}, {"sve2p1", "sve2p2"}, {}},
18551839
{AArch64::ARMV9_6A, {"sve2p2", "nosve2p1"}, {}, {"sve2p1", "sve2p2"}},
18561840

1857-
{AArch64::ARMV9_6A,
1858-
{"nosve2p1", "sve-f16f32mm"},
1859-
{"sve2p1", "sve-f16f32mm"},
1860-
{}},
1861-
{AArch64::ARMV9_6A,
1862-
{"sve-f16f32mm", "nosve2p1"},
1863-
{},
1864-
{"sve2p1", "sve-f16f32mm"}},
1865-
1866-
// sve2-aes -> {sve-aes2}
1867-
{AArch64::ARMV9_6A,
1868-
{"nosve2-aes", "sve-aes2"},
1869-
{"sve2-aes", "sve-aes2"},
1870-
{}},
1871-
{AArch64::ARMV9_6A,
1872-
{"sve-aes2", "nosve2-aes"},
1873-
{},
1874-
{"sve2-aes", "sve-aes2"}},
1875-
18761841
// sme -> {sme2, sme-f16f16, sme-f64f64, sme-i16i64, sme-fa64}
18771842
{AArch64::ARMV8A, {"nosme", "sme2"}, {"sme", "sme2"}, {}},
18781843
{AArch64::ARMV8A, {"sme2", "nosme"}, {}, {"sme", "sme2"}},
@@ -1920,17 +1885,9 @@ AArch64ExtensionDependenciesBaseArchTestParams
19201885
{AArch64::ARMV8A, {"nosme2", "sme-b16b16"}, {"sme2", "sme-b16b16"}, {}},
19211886
{AArch64::ARMV8A, {"sme-b16b16", "nosme2"}, {}, {"sme2", "sme-b16b16"}},
19221887

1923-
// sme2p1 -> {sme2p2, ssve-aes}
1888+
// sme2p1 -> {sme2p2}
19241889
{AArch64::ARMV9_6A, {"nosme2p1", "sme2p2"}, {"sme2p2", "sme2p1"}, {}},
19251890
{AArch64::ARMV9_6A, {"sme2p2", "nosme2p1"}, {}, {"sme2p1", "sme2p2"}},
1926-
{AArch64::ARMV9_6A,
1927-
{"nosme2p1", "ssve-aes"},
1928-
{"sme2p1", "ssve-aes"},
1929-
{}},
1930-
{AArch64::ARMV9_6A,
1931-
{"ssve-aes", "nosme2p1"},
1932-
{},
1933-
{"ssve-aes", "sme2p1"}},
19341891

19351892
// fp8 -> {sme-f8f16, sme-f8f32}
19361893
{AArch64::ARMV8A, {"nofp8", "sme-f8f16"}, {"fp8", "sme-f8f16"}, {}},
@@ -1959,36 +1916,6 @@ AArch64ExtensionDependenciesBaseArchTestParams
19591916
// rcpc -> rcpc3
19601917
{AArch64::ARMV8A, {"norcpc", "rcpc3"}, {"rcpc", "rcpc3"}, {}},
19611918
{AArch64::ARMV8A, {"rcpc3", "norcpc"}, {}, {"rcpc", "rcpc3"}},
1962-
1963-
// fp8dot4 -> f8f32mm
1964-
{AArch64::ARMV9_6A,
1965-
{"nofp8dot4", "f8f32mm"},
1966-
{"fp8dot4", "f8f32mm"},
1967-
{}},
1968-
{AArch64::ARMV9_6A,
1969-
{"f8f32mm", "nofp8dot4"},
1970-
{},
1971-
{"f8f32mm", "fp8dot4"}},
1972-
1973-
// f8f32mm -> f8f16mm
1974-
{AArch64::ARMV9_6A,
1975-
{"nof8f32mm", "f8f16mm"},
1976-
{"f8f16mm", "f8f32mm"},
1977-
{}},
1978-
{AArch64::ARMV9_6A,
1979-
{"f8f16mm", "nof8f32mm"},
1980-
{},
1981-
{"f8f16mm", "f8f32mm"}},
1982-
1983-
// fp8dot2 -> f8f16mm
1984-
{AArch64::ARMV9_6A,
1985-
{"nofp8dot2", "f8f16mm"},
1986-
{"f8f16mm", "fp8dot2"},
1987-
{}},
1988-
{AArch64::ARMV9_6A,
1989-
{"f8f16mm", "nofp8dot2"},
1990-
{},
1991-
{"f8f16mm", "fp8dot2"}},
19921919
};
19931920

19941921
INSTANTIATE_TEST_SUITE_P(

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