Skip to content

Commit b27ce62

Browse files
committed
Fix bitcast type in performSelectCombine()
1 parent 004dc9f commit b27ce62

File tree

1 file changed

+4
-2
lines changed

1 file changed

+4
-2
lines changed

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4943,13 +4943,15 @@ SDValue AMDGPUTargetLowering::performSelectCombine(SDNode *N,
49434943
}
49444944

49454945
// Support source modifiers as integer.
4946+
// (select c, (xor/or/and x, c), y) -> (bitcast (select c)))
49464947
if (VT == MVT::i32 || VT == MVT::v2i32 || VT == MVT::i64) {
49474948
SDLoc SL(N);
49484949
SDValue LHS = N->getOperand(1);
49494950
SDValue RHS = N->getOperand(2);
49504951
if (SDValue SrcMod = BitwiseToSrcModifierOp(LHS, DCI)) {
4951-
SDValue FRHS = DAG.getNode(ISD::BITCAST, SL, VT, RHS);
4952-
SDValue FSelect = DAG.getNode(ISD::SELECT, SL, VT, Cond, SrcMod, FRHS);
4952+
EVT FVT = IntToFloatVT(VT);
4953+
SDValue FRHS = DAG.getNode(ISD::BITCAST, SL, FVT, RHS);
4954+
SDValue FSelect = DAG.getNode(ISD::SELECT, SL, FVT, Cond, SrcMod, FRHS);
49534955
SDValue BC = DAG.getNode(ISD::BITCAST, SL, VT, FSelect);
49544956
return BC;
49554957
}

0 commit comments

Comments
 (0)