getInitValueAsRegClass(Like)

Author: arsenm

llvm/utils/TableGen/Common/CodeGenInstAlias.cpp

@@ -53,14 +53,20 @@ static Expected<ResultOperand> matchSimpleOperand(const Init *Arg,
       const Record *ArgRec = ArgDef->getDef();
 
       // Match 'RegClass:$name' or 'RegOp:$name'.
-      if (const Record *ArgRC = T.getInitValueAsRegClass(Arg)) {
-        if (!T.getRegisterClass(OpRC).hasSubClass(&T.getRegisterClass(ArgRC)))
-          return createStringError(
-              "argument register class" + ArgRC->getName() +
-              " is not a subclass of operand register class " +
-              OpRC->getName());
-        if (!ArgName)
-          return createStringError("register class argument must have a name");
+      if (const Record *ArgRC = T.getInitValueAsRegClassLike(Arg)) {
+        if (ArgRC->isSubClassOf("RegisterClass")) {
+          if (!T.getRegisterClass(OpRC).hasSubClass(&T.getRegisterClass(ArgRC)))
+            return createStringError(
+                "argument register class" + ArgRC->getName() +
+                " is not a subclass of operand register class " +
+                OpRC->getName());
+          if (!ArgName)
+            return createStringError(
+                "register class argument must have a name");
+        }
+
+        // TODO: Verify RegClassByHwMode usage
+
         return ResultOperand::createRecord(ArgName->getAsUnquotedString(),
                                            ArgRec);
       }

llvm/utils/TableGen/Common/CodeGenTarget.cpp

@@ -197,29 +197,38 @@ void CodeGenTarget::ReadLegalValueTypes() const {
   LegalValueTypes.erase(llvm::unique(LegalValueTypes), LegalValueTypes.end());
 }
 
-const Record *CodeGenTarget::getInitValueAsRegClass(const Init *V) const {
-  if (const DefInit *VDefInit = dyn_cast<DefInit>(V)) {
-    const Record *RegClass = VDefInit->getDef();
-    if (RegClass->isSubClassOf("RegisterOperand"))
-      RegClass = RegClass->getValueAsDef("RegClass");
-
-    if (RegClass->isSubClassOf("RegisterClass"))
-      return RegClass;
-
-    // FIXME: We should figure out the hwmode and dispatch. But this interface
-    // is broken, we should be returning a register class. The expected uses
-    // will use the same RegBanks in all modes.
-    if (RegClass->isSubClassOf("RegClassByHwMode")) {
-      const HwModeSelect &ModeSelect = getHwModes().getHwModeSelect(RegClass);
-      if (ModeSelect.Items.empty())
-        return nullptr;
-      return ModeSelect.Items.front().second;
-    }
+const Record *CodeGenTarget::getInitValueAsRegClass(
+    const Init *V, bool AssumeRegClassByHwModeIsDefault) const {
+  const Record *RegClassLike = getInitValueAsRegClassLike(V);
+  if (!RegClassLike || RegClassLike->isSubClassOf("RegisterClass"))
+    return RegClassLike;
+
+  // FIXME: We should figure out the hwmode and dispatch. But this interface
+  // is broken, we should be returning a register class. The expected uses
+  // will use the same RegBanks in all modes.
+  if (AssumeRegClassByHwModeIsDefault &&
+      RegClassLike->isSubClassOf("RegClassByHwMode")) {
+    const HwModeSelect &ModeSelect = getHwModes().getHwModeSelect(RegClassLike);
+    if (ModeSelect.Items.empty())
+      return nullptr;
+    return ModeSelect.Items.front().second;
   }
 
   return nullptr;
 }
 
+const Record *CodeGenTarget::getInitValueAsRegClassLike(const Init *V) const {
+  const DefInit *VDefInit = dyn_cast<DefInit>(V);
+  if (!VDefInit)
+    return nullptr;
+
+  const Record *RegClass = VDefInit->getDef();
+  if (RegClass->isSubClassOf("RegisterOperand"))
+    RegClass = RegClass->getValueAsDef("RegClass");
+
+  return RegClass->isSubClassOf("RegisterClassLike") ? RegClass : nullptr;
+}
+
 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
   if (!SchedModels)
     SchedModels = std::make_unique<CodeGenSchedModels>(Records, *this);

llvm/utils/TableGen/Common/CodeGenTarget.h

@@ -152,7 +152,20 @@ class CodeGenTarget {
     return LegalValueTypes;
   }
 
-  const Record *getInitValueAsRegClass(const Init *V) const;
+  /// If \p V is a DefInit that can be interpreted as a RegisterClass (e.g.,
+  /// it's a RegisterOperand, or a direct RegisterClass reference), return the
+  /// Record for that RegisterClass.
+  ///
+  /// AssumeRegClassByHwModeIsDefault is a hack which should be removed. It's
+  /// only happens to be adequate for the current GlobalISel usage.
+  const Record *
+  getInitValueAsRegClass(const Init *V,
+                         bool AssumeRegClassByHwModeIsDefault = false) const;
+
+  /// If \p V is a DefInit that can be interpreted as a RegisterClassLike,
+  /// return the Record. This is used as a convenience function to handle direct
+  /// RegisterClass references, or those wrapped in a RegisterOperand.
+  const Record *getInitValueAsRegClassLike(const Init *V) const;
 
   CodeGenSchedModels &getSchedModels() const;
 

llvm/utils/TableGen/Common/InfoByHwMode.h

@@ -253,9 +253,6 @@ struct RegClassByHwMode : public InfoByHwMode<const CodeGenRegisterClass *> {
   RegClassByHwMode() = default;
 };
 
-raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T);
-raw_ostream &operator<<(raw_ostream &OS, const RegClassByHwMode &T);
-
 } // namespace llvm
 
 #endif // LLVM_UTILS_TABLEGEN_COMMON_INFOBYHWMODE_H

llvm/utils/TableGen/GlobalISelEmitter.cpp

@@ -1137,7 +1137,9 @@ Error GlobalISelEmitter::importChildMatcher(
         ChildRec->isSubClassOf("RegisterOperand") ||
         ChildRec->isSubClassOf("RegClassByHwMode")) {
       OM.addPredicate<RegisterBankOperandMatcher>(
-          Target.getRegisterClass(Target.getInitValueAsRegClass(ChildDefInit)));
+          Target.getRegisterClass(Target.getInitValueAsRegClass(
+              ChildDefInit,
+              /*AssumeRegClassByHwModeIsDefault=*/true)));
       return Error::success();
     }