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thurstondthurstond
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undef -> poison
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‎llvm/test/Instrumentation/MemorySanitizer/X86/avx512fp16-arith-vl-intrinsics.ll‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1266,11 +1266,11 @@ define <4 x i32> @test_int_x86_avx512_cvt_ph2udq_128(<8 x half> %x0) #0 {
12661266
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 8
12671267
; CHECK-NEXT: call void @llvm.donothing()
12681268
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
1269-
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.128(<8 x half> [[X0]], <4 x i32> undef, i8 -1)
1269+
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.128(<8 x half> [[X0]], <4 x i32> poison, i8 -1)
12701270
; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
12711271
; CHECK-NEXT: ret <4 x i32> [[RES]]
12721272
;
1273-
%res = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.128(<8 x half> %x0, <4 x i32> undef, i8 -1)
1273+
%res = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.128(<8 x half> %x0, <4 x i32> poison, i8 -1)
12741274
ret <4 x i32> %res
12751275
}
12761276

@@ -1332,11 +1332,11 @@ define <8 x i32> @test_int_x86_avx512_cvt_ph2udq_256(<8 x half> %x0) #0 {
13321332
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 8
13331333
; CHECK-NEXT: call void @llvm.donothing()
13341334
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
1335-
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.256(<8 x half> [[X0]], <8 x i32> undef, i8 -1)
1335+
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.256(<8 x half> [[X0]], <8 x i32> poison, i8 -1)
13361336
; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
13371337
; CHECK-NEXT: ret <8 x i32> [[RES]]
13381338
;
1339-
%res = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.256(<8 x half> %x0, <8 x i32> undef, i8 -1)
1339+
%res = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvtph2udq.256(<8 x half> %x0, <8 x i32> poison, i8 -1)
13401340
ret <8 x i32> %res
13411341
}
13421342

@@ -1398,11 +1398,11 @@ define <4 x i32> @test_int_x86_avx512_cvtt_ph2dq_128(<8 x half> %x0) #0 {
13981398
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 8
13991399
; CHECK-NEXT: call void @llvm.donothing()
14001400
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
1401-
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.128(<8 x half> [[X0]], <4 x i32> undef, i8 -1)
1401+
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.128(<8 x half> [[X0]], <4 x i32> poison, i8 -1)
14021402
; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
14031403
; CHECK-NEXT: ret <4 x i32> [[RES]]
14041404
;
1405-
%res = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.128(<8 x half> %x0, <4 x i32> undef, i8 -1)
1405+
%res = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.128(<8 x half> %x0, <4 x i32> poison, i8 -1)
14061406
ret <4 x i32> %res
14071407
}
14081408

@@ -1464,11 +1464,11 @@ define <8 x i32> @test_int_x86_avx512_cvtt_ph2dq_256(<8 x half> %x0) #0 {
14641464
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 8
14651465
; CHECK-NEXT: call void @llvm.donothing()
14661466
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
1467-
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.256(<8 x half> [[X0]], <8 x i32> undef, i8 -1)
1467+
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.256(<8 x half> [[X0]], <8 x i32> poison, i8 -1)
14681468
; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
14691469
; CHECK-NEXT: ret <8 x i32> [[RES]]
14701470
;
1471-
%res = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.256(<8 x half> %x0, <8 x i32> undef, i8 -1)
1471+
%res = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvttph2dq.256(<8 x half> %x0, <8 x i32> poison, i8 -1)
14721472
ret <8 x i32> %res
14731473
}
14741474

@@ -1530,11 +1530,11 @@ define <4 x i32> @test_int_x86_avx512_cvtt_ph2udq_128(<8 x half> %x0) #0 {
15301530
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 8
15311531
; CHECK-NEXT: call void @llvm.donothing()
15321532
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
1533-
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.128(<8 x half> [[X0]], <4 x i32> undef, i8 -1)
1533+
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.128(<8 x half> [[X0]], <4 x i32> poison, i8 -1)
15341534
; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
15351535
; CHECK-NEXT: ret <4 x i32> [[RES]]
15361536
;
1537-
%res = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.128(<8 x half> %x0, <4 x i32> undef, i8 -1)
1537+
%res = call <4 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.128(<8 x half> %x0, <4 x i32> poison, i8 -1)
15381538
ret <4 x i32> %res
15391539
}
15401540

@@ -1596,11 +1596,11 @@ define <8 x i32> @test_int_x86_avx512_cvtt_ph2udq_256(<8 x half> %x0) #0 {
15961596
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 8
15971597
; CHECK-NEXT: call void @llvm.donothing()
15981598
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
1599-
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.256(<8 x half> [[X0]], <8 x i32> undef, i8 -1)
1599+
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.256(<8 x half> [[X0]], <8 x i32> poison, i8 -1)
16001600
; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
16011601
; CHECK-NEXT: ret <8 x i32> [[RES]]
16021602
;
1603-
%res = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.256(<8 x half> %x0, <8 x i32> undef, i8 -1)
1603+
%res = call <8 x i32> @llvm.x86.avx512fp16.mask.vcvttph2udq.256(<8 x half> %x0, <8 x i32> poison, i8 -1)
16041604
ret <8 x i32> %res
16051605
}
16061606

@@ -1662,11 +1662,11 @@ define <4 x float> @test_int_x86_avx512_cvt_ph2psx_128(<8 x half> %x0) #0 {
16621662
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 8
16631663
; CHECK-NEXT: call void @llvm.donothing()
16641664
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
1665-
; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.128(<8 x half> [[X0]], <4 x float> undef, i8 -1)
1665+
; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.128(<8 x half> [[X0]], <4 x float> poison, i8 -1)
16661666
; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
16671667
; CHECK-NEXT: ret <4 x float> [[RES]]
16681668
;
1669-
%res = call <4 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.128(<8 x half> %x0, <4 x float> undef, i8 -1)
1669+
%res = call <4 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.128(<8 x half> %x0, <4 x float> poison, i8 -1)
16701670
ret <4 x float> %res
16711671
}
16721672

@@ -1728,11 +1728,11 @@ define <8 x float> @test_int_x86_avx512_cvt_ph2psx_256(<8 x half> %x0) #0 {
17281728
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr @__msan_param_tls, align 8
17291729
; CHECK-NEXT: call void @llvm.donothing()
17301730
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
1731-
; CHECK-NEXT: [[RES:%.*]] = call <8 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.256(<8 x half> [[X0]], <8 x float> undef, i8 -1)
1731+
; CHECK-NEXT: [[RES:%.*]] = call <8 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.256(<8 x half> [[X0]], <8 x float> poison, i8 -1)
17321732
; CHECK-NEXT: store <8 x i32> zeroinitializer, ptr @__msan_retval_tls, align 8
17331733
; CHECK-NEXT: ret <8 x float> [[RES]]
17341734
;
1735-
%res = call <8 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.256(<8 x half> %x0, <8 x float> undef, i8 -1)
1735+
%res = call <8 x float> @llvm.x86.avx512fp16.mask.vcvtph2psx.256(<8 x half> %x0, <8 x float> poison, i8 -1)
17361736
ret <8 x float> %res
17371737
}
17381738

@@ -1837,11 +1837,11 @@ define <8 x half> @test_int_x86_avx512_cvt_ps2phx_256(<8 x float> %x0) #0 {
18371837
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8
18381838
; CHECK-NEXT: call void @llvm.donothing()
18391839
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]]
1840-
; CHECK-NEXT: [[RES:%.*]] = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.256(<8 x float> [[X0]], <8 x half> undef, i8 -1)
1840+
; CHECK-NEXT: [[RES:%.*]] = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.256(<8 x float> [[X0]], <8 x half> poison, i8 -1)
18411841
; CHECK-NEXT: store <8 x i16> zeroinitializer, ptr @__msan_retval_tls, align 8
18421842
; CHECK-NEXT: ret <8 x half> [[RES]]
18431843
;
1844-
%res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.256(<8 x float> %x0, <8 x half> undef, i8 -1)
1844+
%res = call <8 x half> @llvm.x86.avx512fp16.mask.vcvtps2phx.256(<8 x float> %x0, <8 x half> poison, i8 -1)
18451845
ret <8 x half> %res
18461846
}
18471847

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