[Xtensa] Minor improvements in disassembler.

Author: andreisfr

llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp

@@ -73,58 +73,46 @@ static DecodeStatus DecodeARRegisterClass(MCInst &Inst, uint64_t RegNo,
   return MCDisassembler::Success;
 }
 
-static const MCPhysReg MRDecoderTable[] = {Xtensa::M0, Xtensa::M1, Xtensa::M2,
-                                           Xtensa::M3};
-
 static DecodeStatus DecodeMRRegisterClass(MCInst &Inst, uint64_t RegNo,
                                           uint64_t Address,
                                           const void *Decoder) {
-  if (RegNo >= std::size(MRDecoderTable))
+  if (RegNo > 3)
     return MCDisassembler::Fail;
 
-  MCPhysReg Reg = MRDecoderTable[RegNo];
+  MCPhysReg Reg = Xtensa::M0 + RegNo;
   Inst.addOperand(MCOperand::createReg(Reg));
   return MCDisassembler::Success;
 }
 
-static const MCPhysReg MR01DecoderTable[] = {Xtensa::M0, Xtensa::M1};
-
 static DecodeStatus DecodeMR01RegisterClass(MCInst &Inst, uint64_t RegNo,
                                             uint64_t Address,
                                             const void *Decoder) {
-  if (RegNo > 2)
+  if (RegNo > 1)
     return MCDisassembler::Fail;
 
-  MCPhysReg Reg = MR01DecoderTable[RegNo];
+  MCPhysReg Reg = Xtensa::M0 + RegNo;
   Inst.addOperand(MCOperand::createReg(Reg));
   return MCDisassembler::Success;
 }
 
-static const MCPhysReg MR23DecoderTable[] = {Xtensa::M2, Xtensa::M3};
-
 static DecodeStatus DecodeMR23RegisterClass(MCInst &Inst, uint64_t RegNo,
                                             uint64_t Address,
                                             const void *Decoder) {
-  if (RegNo != 0 && RegNo != 1)
+  if (RegNo > 1)
     return MCDisassembler::Fail;
 
-  MCPhysReg Reg = MR23DecoderTable[RegNo];
+  MCPhysReg Reg = Xtensa::M2 + RegNo;
   Inst.addOperand(MCOperand::createReg(Reg));
   return MCDisassembler::Success;
 }
 
-static const MCPhysReg FPRDecoderTable[] = {
-    Xtensa::F0,  Xtensa::F1,  Xtensa::F2,  Xtensa::F3, Xtensa::F4,  Xtensa::F5,
-    Xtensa::F6,  Xtensa::F7,  Xtensa::F8,  Xtensa::F9, Xtensa::F10, Xtensa::F11,
-    Xtensa::F12, Xtensa::F13, Xtensa::F14, Xtensa::F15};
-
 static DecodeStatus DecodeFPRRegisterClass(MCInst &Inst, uint64_t RegNo,
                                            uint64_t Address,
                                            const void *Decoder) {
-  if (RegNo >= std::size(FPRDecoderTable))
+  if (RegNo > 15)
     return MCDisassembler::Fail;
 
-  MCPhysReg Reg = FPRDecoderTable[RegNo];
+  MCPhysReg Reg = Xtensa::F0 + RegNo;
   Inst.addOperand(MCOperand::createReg(Reg));
   return MCDisassembler::Success;
 }
@@ -222,18 +210,13 @@ static DecodeStatus DecodeSRRegisterClass(MCInst &Inst, uint64_t RegNo,
   return MCDisassembler::Fail;
 }
 
-const MCPhysReg BRDecoderTable[] = {
-    Xtensa::B0,  Xtensa::B1,  Xtensa::B2,  Xtensa::B3, Xtensa::B4,  Xtensa::B5,
-    Xtensa::B6,  Xtensa::B7,  Xtensa::B8,  Xtensa::B9, Xtensa::B10, Xtensa::B11,
-    Xtensa::B12, Xtensa::B13, Xtensa::B14, Xtensa::B15};
-
 static DecodeStatus DecodeBRRegisterClass(MCInst &Inst, uint64_t RegNo,
                                           uint64_t Address,
                                           const void *Decoder) {
-  if (RegNo >= std::size(BRDecoderTable))
+  if (RegNo > 15)
     return MCDisassembler::Fail;
 
-  MCPhysReg Reg = BRDecoderTable[RegNo];
+  MCPhysReg Reg = Xtensa::B0 + RegNo;
   Inst.addOperand(MCOperand::createReg(Reg));
   return MCDisassembler::Success;
 }