File tree Expand file tree Collapse file tree 3 files changed +8
-9
lines changed
include/llvm/TargetParser Expand file tree Collapse file tree 3 files changed +8
-9
lines changed Original file line number Diff line number Diff line change @@ -22715,22 +22715,22 @@ Value *CodeGenFunction::EmitRISCVCpuIs(StringRef CPUStr) {
2271522715 return CPUID;
2271622716 };
2271722717
22718- const llvm::RISCV::CPUModel CPUModel = llvm::RISCV::getCPUModel(CPUStr);
22718+ const llvm::RISCV::CPUModel Model = llvm::RISCV::getCPUModel(CPUStr);
2271922719
2272022720 // Compare mvendorid.
2272122721 Value *VendorID = loadRISCVCPUID(0);
2272222722 Value *Result =
22723- Builder.CreateICmpEQ(VendorID, Builder.getInt32(CPUModel .MVendorID));
22723+ Builder.CreateICmpEQ(VendorID, Builder.getInt32(Model .MVendorID));
2272422724
2272522725 // Compare marchid.
2272622726 Value *ArchID = loadRISCVCPUID(1);
2272722727 Result = Builder.CreateAnd(
22728- Result, Builder.CreateICmpEQ(ArchID, Builder.getInt64(CPUModel .MArchID)));
22728+ Result, Builder.CreateICmpEQ(ArchID, Builder.getInt64(Model .MArchID)));
2272922729
2273022730 // Compare mimpid.
2273122731 Value *ImpID = loadRISCVCPUID(2);
2273222732 Result = Builder.CreateAnd(
22733- Result, Builder.CreateICmpEQ(ImpID, Builder.getInt64(CPUModel .MImpID)));
22733+ Result, Builder.CreateICmpEQ(ImpID, Builder.getInt64(Model .MImpID)));
2273422734
2273522735 return Result;
2273622736}
Original file line number Diff line number Diff line change @@ -43,7 +43,7 @@ struct CPUInfo {
4343 StringLiteral DefaultMarch;
4444 bool FastScalarUnalignedAccess;
4545 bool FastVectorUnalignedAccess;
46- CPUModel CPUModel ;
46+ CPUModel Model ;
4747 bool is64Bit () const { return DefaultMarch.starts_with (" rv64" ); }
4848};
4949
Original file line number Diff line number Diff line change @@ -58,16 +58,15 @@ bool hasFastVectorUnalignedAccess(StringRef CPU) {
5858}
5959
6060bool hasValidCPUModel (StringRef CPU) {
61- const CPUModel CPUModel = getCPUModel (CPU);
62- return CPUModel.MVendorID != 0 && CPUModel.MArchID != 0 &&
63- CPUModel.MImpID != 0 ;
61+ const CPUModel Model = getCPUModel (CPU);
62+ return Model.MVendorID != 0 && Model.MArchID != 0 && Model.MImpID != 0 ;
6463}
6564
6665CPUModel getCPUModel (StringRef CPU) {
6766 const CPUInfo *Info = getCPUInfoByName (CPU);
6867 if (!Info)
6968 return {0 , 0 , 0 };
70- return Info->CPUModel ;
69+ return Info->Model ;
7170}
7271
7372bool parseCPU (StringRef CPU, bool IsRV64) {
You can’t perform that action at this time.
0 commit comments