fixup! add another test

Author: michaelmaitland

llvm/test/CodeGen/RISCV/rvv/vl-opt.mir

@@ -453,10 +453,10 @@ body: |
     %z:vr = PseudoVADD_VV_M1 $noreg, %y, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
 ...
 ---
-name: phi_cycle
+name: phi_cycle_direct
 tracksRegLiveness: true
 body: |
-  ; CHECK-LABEL: name: phi_cycle
+  ; CHECK-LABEL: name: phi_cycle_direct
   ; CHECK: bb.0:
   ; CHECK-NEXT:   successors: %bb.1(0x80000000)
   ; CHECK-NEXT: {{  $}}
@@ -475,4 +475,27 @@ body: |
     %z:vr = PseudoVADD_VV_M1 $noreg, %y, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
     PseudoBR %bb.1
 ...
+---
+name: phi_cycle_indirect
+tracksRegLiveness: true
+body: |
+  ; CHECK-LABEL: name: phi_cycle_indirect
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   %y:vr = PHI %x, %bb.0, %z, %bb.1
+  ; CHECK-NEXT:   %z:vr = PseudoVADD_VV_M1 $noreg, %y, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
+  ; CHECK-NEXT:   PseudoBR %bb.1
+  bb.0:
+    %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */
+  bb.1:
+    %y:vr = PHI %x, %bb.0, %z, %bb.1
+    %z:vr = PseudoVADD_VV_M1 $noreg, %y, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
+    PseudoBR %bb.1
+...