@@ -43,3 +43,170 @@ define float @test_atomicrmw_fsub_f32(ptr %ptr, float %value) {
4343 ret float %res
4444}
4545
46+ define float @atomicrmw_fmin_float (ptr %ptr , float %value ) {
47+ ; CHECK-LABEL: @atomicrmw_fmin_float(
48+ ; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4
49+ ; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
50+ ; CHECK: atomicrmw.start:
51+ ; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
52+ ; CHECK-NEXT: [[TMP2:%.*]] = call float @llvm.minnum.f32(float [[LOADED]], float [[VALUE:%.*]])
53+ ; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
54+ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
55+ ; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
56+ ; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
57+ ; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
58+ ; CHECK-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
59+ ; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
60+ ; CHECK: atomicrmw.end:
61+ ; CHECK-NEXT: ret float [[TMP6]]
62+ ;
63+ %res = atomicrmw fmin ptr %ptr , float %value seq_cst
64+ ret float %res
65+ }
66+
67+ define float @atomicrmw_fmax_float (ptr %ptr , float %value ) {
68+ ; CHECK-LABEL: @atomicrmw_fmax_float(
69+ ; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4
70+ ; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
71+ ; CHECK: atomicrmw.start:
72+ ; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
73+ ; CHECK-NEXT: [[TMP2:%.*]] = call float @llvm.maxnum.f32(float [[LOADED]], float [[VALUE:%.*]])
74+ ; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
75+ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
76+ ; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
77+ ; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
78+ ; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
79+ ; CHECK-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
80+ ; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
81+ ; CHECK: atomicrmw.end:
82+ ; CHECK-NEXT: ret float [[TMP6]]
83+ ;
84+ %res = atomicrmw fmax ptr %ptr , float %value seq_cst
85+ ret float %res
86+ }
87+
88+ define double @atomicrmw_fmin_double (ptr %ptr , double %value ) {
89+ ; CHECK-LABEL: @atomicrmw_fmin_double(
90+ ; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8
91+ ; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
92+ ; CHECK: atomicrmw.start:
93+ ; CHECK-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
94+ ; CHECK-NEXT: [[TMP2:%.*]] = call double @llvm.minnum.f64(double [[LOADED]], double [[VALUE:%.*]])
95+ ; CHECK-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
96+ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
97+ ; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
98+ ; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
99+ ; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
100+ ; CHECK-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
101+ ; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
102+ ; CHECK: atomicrmw.end:
103+ ; CHECK-NEXT: ret double [[TMP6]]
104+ ;
105+ %res = atomicrmw fmin ptr %ptr , double %value seq_cst
106+ ret double %res
107+ }
108+
109+ define double @atomicrmw_fmax_double (ptr %ptr , double %value ) {
110+ ; CHECK-LABEL: @atomicrmw_fmax_double(
111+ ; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8
112+ ; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
113+ ; CHECK: atomicrmw.start:
114+ ; CHECK-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
115+ ; CHECK-NEXT: [[TMP2:%.*]] = call double @llvm.maxnum.f64(double [[LOADED]], double [[VALUE:%.*]])
116+ ; CHECK-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
117+ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
118+ ; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
119+ ; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
120+ ; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
121+ ; CHECK-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
122+ ; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
123+ ; CHECK: atomicrmw.end:
124+ ; CHECK-NEXT: ret double [[TMP6]]
125+ ;
126+ %res = atomicrmw fmax ptr %ptr , double %value seq_cst
127+ ret double %res
128+ }
129+
130+ define float @atomicrmw_fminimum_float (ptr %ptr , float %value ) {
131+ ; CHECK-LABEL: @atomicrmw_fminimum_float(
132+ ; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4
133+ ; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
134+ ; CHECK: atomicrmw.start:
135+ ; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
136+ ; CHECK-NEXT: [[TMP2:%.*]] = call float @llvm.minimum.f32(float [[LOADED]], float [[VALUE:%.*]])
137+ ; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
138+ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
139+ ; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
140+ ; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
141+ ; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
142+ ; CHECK-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
143+ ; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
144+ ; CHECK: atomicrmw.end:
145+ ; CHECK-NEXT: ret float [[TMP6]]
146+ ;
147+ %res = atomicrmw fminimum ptr %ptr , float %value seq_cst
148+ ret float %res
149+ }
150+
151+ define float @atomicrmw_fmaximum_float (ptr %ptr , float %value ) {
152+ ; CHECK-LABEL: @atomicrmw_fmaximum_float(
153+ ; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4
154+ ; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
155+ ; CHECK: atomicrmw.start:
156+ ; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
157+ ; CHECK-NEXT: [[TMP2:%.*]] = call float @llvm.maximum.f32(float [[LOADED]], float [[VALUE:%.*]])
158+ ; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[TMP2]] to i32
159+ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
160+ ; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst, align 4
161+ ; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
162+ ; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
163+ ; CHECK-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
164+ ; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
165+ ; CHECK: atomicrmw.end:
166+ ; CHECK-NEXT: ret float [[TMP6]]
167+ ;
168+ %res = atomicrmw fmaximum ptr %ptr , float %value seq_cst
169+ ret float %res
170+ }
171+
172+ define double @atomicrmw_fminimum_double (ptr %ptr , double %value ) {
173+ ; CHECK-LABEL: @atomicrmw_fminimum_double(
174+ ; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8
175+ ; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
176+ ; CHECK: atomicrmw.start:
177+ ; CHECK-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
178+ ; CHECK-NEXT: [[TMP2:%.*]] = call double @llvm.minimum.f64(double [[LOADED]], double [[VALUE:%.*]])
179+ ; CHECK-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
180+ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
181+ ; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
182+ ; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
183+ ; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
184+ ; CHECK-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
185+ ; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
186+ ; CHECK: atomicrmw.end:
187+ ; CHECK-NEXT: ret double [[TMP6]]
188+ ;
189+ %res = atomicrmw fminimum ptr %ptr , double %value seq_cst
190+ ret double %res
191+ }
192+
193+ define double @atomicrmw_fmaximum_double (ptr %ptr , double %value ) {
194+ ; CHECK-LABEL: @atomicrmw_fmaximum_double(
195+ ; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[PTR:%.*]], align 8
196+ ; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
197+ ; CHECK: atomicrmw.start:
198+ ; CHECK-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
199+ ; CHECK-NEXT: [[TMP2:%.*]] = call double @llvm.maximum.f64(double [[LOADED]], double [[VALUE:%.*]])
200+ ; CHECK-NEXT: [[TMP3:%.*]] = bitcast double [[TMP2]] to i64
201+ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
202+ ; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst, align 8
203+ ; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
204+ ; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
205+ ; CHECK-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
206+ ; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
207+ ; CHECK: atomicrmw.end:
208+ ; CHECK-NEXT: ret double [[TMP6]]
209+ ;
210+ %res = atomicrmw fmaximum ptr %ptr , double %value seq_cst
211+ ret double %res
212+ }
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