[NFC] Simple typo correction. (#114548)

Author: c8ef

clang/test/CodeGenSYCL/unique_stable_name_windows_diff.cpp

@@ -36,7 +36,7 @@ int main() {
   (void)__builtin_sycl_unique_stable_name(decltype(lambda3));
 
   // Make sure the following 3 are the same between the host and device compile.
-  // Note that these are NOT the same value as eachother, they differ by the
+  // Note that these are NOT the same value as each other, they differ by the
   // signature.
   // CHECK: private unnamed_addr [[$ADDRSPACE]]constant [17 x i8] c"_ZTSZ4mainEUlvE_\00"
   // CHECK: private unnamed_addr [[$ADDRSPACE]]constant [17 x i8] c"_ZTSZ4mainEUliE_\00"

clang/test/SemaCXX/ext-vector-type-conditional.cpp

@@ -86,7 +86,7 @@ void Operands() {
   (void)(four_ints ? uss : shrt);    // should be fine, since they get promoted to int.
   (void)(four_ints ? shrt : shrt);   // expected-error {{vector condition type 'FourInts' (vector of 4 'int' values) and result type 'short __attribute__((ext_vector_type(4)))' (vector of 4 'short' values) do not have elements of the same size}}
 
-  // Vectors must be the same type as eachother.
+  // Vectors must be the same type as each other.
   (void)(four_ints ? four_uints : four_floats); // expected-error {{vector operands to the vector conditional must be the same type ('FourUInts' (vector of 4 'unsigned int' values) and 'FourFloats' (vector of 4 'float' values))}}
   (void)(four_ints ? four_uints : four_ints);   // expected-error {{vector operands to the vector conditional must be the same type ('FourUInts' (vector of 4 'unsigned int' values) and 'FourInts' (vector of 4 'int' values))}}
   (void)(four_ints ? four_ints : four_uints);   // expected-error {{vector operands to the vector conditional must be the same type ('FourInts' (vector of 4 'int' values) and 'FourUInts' (vector of 4 'unsigned int' values))}}

clang/test/SemaCXX/vector-size-conditional.cpp

@@ -89,7 +89,7 @@ void Operands() {
   (void)(four_ints ? uss : shrt);    // should be fine, since they get promoted to int.
   (void)(four_ints ? shrt : shrt);   //expected-error {{vector condition type 'FourInts' (vector of 4 'int' values) and result type '__attribute__((__vector_size__(4 * sizeof(short)))) short' (vector of 4 'short' values) do not have elements of the same size}}
 
-  // Vectors must be the same type as eachother.
+  // Vectors must be the same type as each other.
   (void)(four_ints ? four_uints : four_floats); // expected-error {{vector operands to the vector conditional must be the same type ('FourUInts' (vector of 4 'unsigned int' values) and 'FourFloats' (vector of 4 'float' values))}}
   (void)(four_ints ? four_uints : four_ints);   // expected-error {{vector operands to the vector conditional must be the same type ('FourUInts' (vector of 4 'unsigned int' values) and 'FourInts' (vector of 4 'int' values))}}
   (void)(four_ints ? four_ints : four_uints);   // expected-error {{vector operands to the vector conditional must be the same type ('FourInts' (vector of 4 'int' values) and 'FourUInts' (vector of 4 'unsigned int' values))}}

compiler-rt/lib/ctx_profile/CtxInstrContextNode.h

@@ -10,7 +10,7 @@
 // NOTE!
 // llvm/lib/ProfileData/CtxInstrContextNode.h and
 //   compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
-// must be exact copies of eachother
+// must be exact copies of each other
 //
 // compiler-rt creates these objects as part of the instrumentation runtime for
 // contextual profiling. LLVM only consumes them to convert a contextual tree

compiler-rt/test/ctx_profile/TestCases/check-same-ctx-node.test

@@ -1,5 +1,5 @@
 ;
 ; NOTE: if this test fails, please make sure the two files are identical copies
-; of eachother.
+; of each other.
 ;
 ; RUN: diff %crt_src/lib/ctx_profile/CtxInstrContextNode.h %llvm_src/include/llvm/ProfileData/CtxInstrContextNode.h

libc/docs/gpu/rpc.rst

@@ -231,7 +231,7 @@ but the following example shows how it can be used by a standard user.
   }
 
   // Routines to allocate mapped memory that both the host and the device can
-  // access asychonrously to communicate with eachother.
+  // access asychonrously to communicate with each other.
   void *alloc_host(size_t size, void *) {
     void *sharable_ptr;
     if (cudaError_t err = cudaMallocHost(&sharable_ptr, sizeof(void *)))

llvm/include/llvm/MCA/HardwareUnits/LSUnit.h

@@ -210,8 +210,8 @@ class LSUnitBase : public HardwareUnit {
   /// True if loads don't alias with stores.
   ///
   /// By default, the LS unit assumes that loads and stores don't alias with
-  /// eachother. If this field is set to false, then loads are always assumed to
-  /// alias with stores.
+  /// each other. If this field is set to false, then loads are always assumed
+  /// to alias with stores.
   const bool NoAlias;
 
   /// Used to map group identifiers to MemoryGroups.

llvm/include/llvm/ProfileData/CtxInstrContextNode.h

@@ -10,7 +10,7 @@
 // NOTE!
 // llvm/lib/ProfileData/CtxInstrContextNode.h and
 //   compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
-// must be exact copies of eachother
+// must be exact copies of each other
 //
 // compiler-rt creates these objects as part of the instrumentation runtime for
 // contextual profiling. LLVM only consumes them to convert a contextual tree

llvm/lib/Target/X86/X86.h

@@ -145,7 +145,7 @@ FunctionPass *createX86IndirectThunksPass();
 FunctionPass *createX86ReturnThunksPass();
 
 /// This pass ensures instructions featuring a memory operand
-/// have distinctive <LineNumber, Discriminator> (with respect to eachother)
+/// have distinctive <LineNumber, Discriminator> (with respect to each other)
 FunctionPass *createX86DiscriminateMemOpsPass();
 
 /// This pass applies profiling information to insert cache prefetches.

mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir

@@ -22,7 +22,7 @@ module {
   %84 = llvm.alloca %83 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> : (i64) -> !llvm.ptr
   %86 = llvm.mlir.constant(1 : i64) : i64
   %87 = llvm.alloca %86 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> : (i64) -> !llvm.ptr
-// test multiple reduction variables to ensure they don't intefere with eachother
+// test multiple reduction variables to ensure they don't intefere with each other
 // when inlining the reduction init region multiple times
     omp.parallel reduction(byref @add_reduction_byref_box_Uxf64 %84 -> %arg3, byref @add_reduction_byref_box_Uxf64 %87 -> %arg4 : !llvm.ptr, !llvm.ptr) {
       omp.terminator