Split ReplaceNodeResults path out from LowerBITCAST

Author: peterbell10

llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

@@ -409,6 +409,13 @@ VectorizePTXValueVTs(const SmallVectorImpl<EVT> &ValueVTs,
   return VectorInfo;
 }
 
+static SDValue MaybeBitcast(SelectionDAG &DAG, SDLoc DL, EVT VT,
+                            SDValue Value) {
+  if (Value->getValueType(0) == VT)
+    return Value;
+  return DAG.getNode(ISD::BITCAST, DL, VT, Value);
+}
+
 // NVPTXTargetLowering Constructor.
 NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM,
                                          const NVPTXSubtarget &STI)
@@ -2316,30 +2323,14 @@ NVPTXTargetLowering::LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const {
 }
 
 SDValue NVPTXTargetLowering::LowerBITCAST(SDValue Op, SelectionDAG &DAG) const {
-  // Handle bitcasting to/from v2i8 without hitting the default promotion
+  // Handle bitcasting from v2i8 without hitting the default promotion
   // strategy which goes through stack memory.
-  SDNode *Node = Op.getNode();
-  SDLoc DL(Node);
-
-  auto maybeBitcast = [&](EVT VT, SDValue Value) {
-    if (Value->getValueType(0) == VT)
-      return Value;
-    return DAG.getNode(ISD::BITCAST, DL, VT, Value);
-  };
+  SDLoc DL(Op);
 
   EVT ToVT = Op->getValueType(0);
   EVT FromVT = Op->getOperand(0)->getValueType(0);
 
-  if (ToVT == MVT::v2i8) {
-    // Bitcast to i16 and unpack elements into a vector
-    SDValue AsInt = maybeBitcast(MVT::i16, Op->getOperand(0));
-    SDValue Vec0 = DAG.getNode(ISD::TRUNCATE, DL, MVT::i8, AsInt);
-    SDValue Const8 = DAG.getConstant(8, DL, MVT::i16);
-    SDValue Vec1 =
-        DAG.getNode(ISD::TRUNCATE, DL, MVT::i8,
-                    DAG.getNode(ISD::SRL, DL, MVT::i16, {AsInt, Const8}));
-    return DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v2i8, {Vec0, Vec1});
-  } else if (FromVT == MVT::v2i8) {
+  if (FromVT == MVT::v2i8) {
     // Pack vector elements into i16 and bitcast to final type
     SDValue Vec0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i8,
                                Op->getOperand(0), DAG.getIntPtrConstant(0, DL));
@@ -2351,7 +2342,7 @@ SDValue NVPTXTargetLowering::LowerBITCAST(SDValue Op, SelectionDAG &DAG) const {
     SDValue AsInt = DAG.getNode(
         ISD::OR, DL, MVT::i16,
         {Extend0, DAG.getNode(ISD::SHL, DL, MVT::i16, {Extend1, Const8})});
-    return maybeBitcast(ToVT, AsInt);
+    return MaybeBitcast(DAG, DL, ToVT, AsInt);
   }
   return Op;
 }
@@ -6175,6 +6166,26 @@ SDValue NVPTXTargetLowering::PerformDAGCombine(SDNode *N,
   return SDValue();
 }
 
+static void ReplaceBITCAST(SDNode *Node, SelectionDAG &DAG,
+                           SmallVectorImpl<SDValue> &Results) {
+  // Handle bitcasting to v2i8 without hitting the default promotion
+  // strategy which goes through stack memory.
+  SDValue Op(Node, 0);
+  SDLoc DL(Node);
+
+  EVT ToVT = Op->getValueType(0);
+  if (ToVT == MVT::v2i8) {
+    SDValue AsInt = MaybeBitcast(DAG, DL, MVT::i16, Op->getOperand(0));
+    SDValue Vec0 = DAG.getNode(ISD::TRUNCATE, DL, MVT::i8, AsInt);
+    SDValue Const8 = DAG.getConstant(8, DL, MVT::i16);
+    SDValue Vec1 =
+        DAG.getNode(ISD::TRUNCATE, DL, MVT::i8,
+                    DAG.getNode(ISD::SRL, DL, MVT::i16, {AsInt, Const8}));
+    Results.push_back(
+        DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v2i8, {Vec0, Vec1}));
+  }
+}
+
 /// ReplaceVectorLoad - Convert vector loads into multi-output scalar loads.
 static void ReplaceLoadVector(SDNode *N, SelectionDAG &DAG,
                               SmallVectorImpl<SDValue> &Results) {
@@ -6461,7 +6472,7 @@ void NVPTXTargetLowering::ReplaceNodeResults(
   default:
     report_fatal_error("Unhandled custom legalization");
   case ISD::BITCAST:
-    Results.push_back(LowerBITCAST(SDValue(N, 0), DAG));
+    ReplaceBITCAST(N, DAG, Results);
     return;
   case ISD::LOAD:
     ReplaceLoadVector(N, DAG, Results);