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adding tests
1 parent 0f68438 commit b621ea8

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5 files changed

+89
-23
lines changed

5 files changed

+89
-23
lines changed

‎clang/include/clang/Basic/Builtins.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4898,7 +4898,7 @@ def HLSLSplitDouble: LangBuiltin<"HLSL_LANG"> {
48984898
def HLSLClip: LangBuiltin<"HLSL_LANG"> {
48994899
let Spellings = ["__builtin_hlsl_elementwise_clip"];
49004900
let Attributes = [NoThrow, Const];
4901-
let Prototype = "void(bool)";
4901+
let Prototype = "void(...)";
49024902
}
49034903

49044904
// Builtins for XRay.

‎clang/lib/CodeGen/CGBuiltin.cpp‎

Lines changed: 21 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,10 @@
4141
#include "llvm/ADT/SmallPtrSet.h"
4242
#include "llvm/ADT/StringExtras.h"
4343
#include "llvm/Analysis/ValueTracking.h"
44+
#include "llvm/IR/Constants.h"
4445
#include "llvm/IR/DataLayout.h"
4546
#include "llvm/IR/InlineAsm.h"
47+
#include "llvm/IR/InstrTypes.h"
4648
#include "llvm/IR/Intrinsics.h"
4749
#include "llvm/IR/IntrinsicsAArch64.h"
4850
#include "llvm/IR/IntrinsicsAMDGPU.h"
@@ -55,12 +57,14 @@
5557
#include "llvm/IR/IntrinsicsR600.h"
5658
#include "llvm/IR/IntrinsicsRISCV.h"
5759
#include "llvm/IR/IntrinsicsS390.h"
60+
#include "llvm/IR/IntrinsicsSPIRV.h"
5861
#include "llvm/IR/IntrinsicsVE.h"
5962
#include "llvm/IR/IntrinsicsWebAssembly.h"
6063
#include "llvm/IR/IntrinsicsX86.h"
6164
#include "llvm/IR/MDBuilder.h"
6265
#include "llvm/IR/MatrixBuilder.h"
6366
#include "llvm/IR/MemoryModelRelaxationAnnotations.h"
67+
#include "llvm/IR/Type.h"
6468
#include "llvm/Support/AMDGPUAddrSpace.h"
6569
#include "llvm/Support/ConvertUTF.h"
6670
#include "llvm/Support/MathExtras.h"
@@ -101,13 +105,28 @@ static void initializeAlloca(CodeGenFunction &CGF, AllocaInst *AI, Value *Size,
101105

102106
static Value *handleHlslClip(const CallExpr *E, CodeGenFunction *CGF) {
103107
Value *Op0 = CGF->EmitScalarExpr(E->getArg(0));
104-
auto *CMP = CGF->Builder.CreateFCmpOLT(
105-
Op0, ConstantFP::get(CGF->Builder.getFloatTy(), 0.0));
108+
109+
Constant *FZeroConst = ConstantFP::getZero(CGF->FloatTy);
110+
Value *CMP;
111+
112+
if (const auto *VecTy = E->getArg(0)->getType()->getAs<clang::VectorType>()) {
113+
FZeroConst = ConstantVector::getSplat(
114+
ElementCount::getFixed(VecTy->getNumElements()), FZeroConst);
115+
CMP = CGF->Builder.CreateFCmpOLT(Op0, FZeroConst);
116+
} else
117+
CMP = CGF->Builder.CreateFCmpOLT(Op0, FZeroConst);
106118

107119
if (CGF->CGM.getTarget().getTriple().isDXIL())
108120
return CGF->Builder.CreateIntrinsic(CGF->VoidTy, llvm::Intrinsic::dx_clip,
109121
{CMP}, nullptr);
110122

123+
if (const auto *VecTy = E->getArg(0)->getType()->getAs<clang::VectorType>()){
124+
125+
CMP = CGF->Builder.CreateIntrinsic(CGF->Builder.getInt1Ty(), llvm::Intrinsic::spv_any,
126+
{CMP}, nullptr);
127+
}
128+
129+
111130
BasicBlock *LT0 = CGF->createBasicBlock("lt0", CGF->CurFn);
112131
BasicBlock *End = CGF->createBasicBlock("end", CGF->CurFn);
113132

‎clang/test/CodeGenHLSL/builtins/clip.hlsl‎

Lines changed: 32 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,36 @@
11
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-pixel %s -fnative-half-type -emit-llvm -o - | FileCheck %s
2-
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple spirv-vulkan-pixel %s -fnative-half-type -emit-llvm -o - | FileCheck %s
2+
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple spirv-vulkan-pixel %s -fnative-half-type -emit-llvm -o - | FileCheck %s --check-prefix=SPIRV
33

4-
//CHECK-LABEL: define void @main()
5-
void test(float Buf) {
6-
//CHECK: [[LOAD:%.*]] = load <4 x float>, ptr %p1{{.*}}, align 16
7-
//CHECK-NEXT: [[EXTR:%.*]] = extractelement <4 x float> [[LOAD]], i32 3
8-
//CHECK-NEXT: [[FCMP:%.*]] = fcmp olt float [[EXTR]], 0.000000e+00
9-
//CHECK-NEXT: call void @llvm.dx.clip(i1 [[FCMP]])
4+
5+
void test_scalar(float Buf) {
6+
// CHECK: define void @{{.*}}test_scalar{{.*}}(float {{.*}} [[VALP:%.*]])
7+
// CHECK: [[LOAD:%.*]] = load float, ptr [[VALP]].addr, align 4
8+
// CHECK-NEXT: [[FCMP:%.*]] = fcmp olt float [[LOAD]], 0.000000e+00
9+
// CHECK-NEXT: call void @llvm.dx.clip.i1(i1 [[FCMP]])
10+
//
11+
// SPIRV: define spir_func void @{{.*}}test_scalar{{.*}}(float {{.*}} [[VALP:%.*]])
12+
// SPIRV: [[LOAD:%.*]] = load float, ptr [[VALP]].addr, align 4
13+
// SPIRV-NEXT: [[FCMP:%.*]] = fcmp olt float [[LOAD]], 0.000000e+00
14+
// SPIRV-NEXT: br i1 [[FCMP]], label %[[LTL:.*]], label %[[ENDL:.*]]
15+
// SPIRV: [[LTL]]: ; preds = %entry
16+
// SPIRV-NEXT: call void @llvm.spv.clip()
17+
// SPIRV: br label %[[ENDL]]
18+
clip(Buf);
19+
}
20+
21+
void test_vector4(float4 Buf) {
22+
// CHECK: define void @{{.*}}test_vector{{.*}}(<4 x float> {{.*}} [[VALP:%.*]])
23+
// CHECK: [[LOAD:%.*]] = load <4 x float>, ptr [[VALP]].addr, align 16
24+
// CHECK-NEXT: [[FCMP:%.*]] = fcmp olt <4 x float> [[LOAD]], zeroinitializer
25+
// CHECK-NEXT: call void @llvm.dx.clip.v4i1(<4 x i1> [[FCMP]])
26+
//
27+
// SPIRV: define spir_func void @{{.*}}test_vector{{.*}}(<4 x float> {{.*}} [[VALP:%.*]])
28+
// SPIRV: [[LOAD:%.*]] = load <4 x float>, ptr [[VALP]].addr, align 16
29+
// SPIRV-NEXT: [[FCMP:%.*]] = fcmp olt <4 x float> [[LOAD]], zeroinitializer
30+
// SPIRV-NEXT: [[RED:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[FCMP]])
31+
// SPIRV-NEXT: br i1 [[RED]], label %[[LTL:.*]], label %[[ENDL:.*]]
32+
// SPIRV: [[LTL]]: ; preds = %entry
33+
// SPIRV-NEXT: call void @llvm.spv.clip()
34+
// SPIRV-NEXT: br label %[[ENDL]]
1035
clip(Buf);
1136
}

‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@
3232
#include "llvm/CodeGen/TargetOpcodes.h"
3333
#include "llvm/IR/IntrinsicsSPIRV.h"
3434
#include "llvm/Support/Debug.h"
35+
#include "llvm/Support/VersionTuple.h"
3536

3637
#define DEBUG_TYPE "spirv-isel"
3738

@@ -2160,11 +2161,9 @@ bool SPIRVInstructionSelector::selectSplatVector(Register ResVReg,
21602161
bool SPIRVInstructionSelector::selectClip(Register ResVReg,
21612162
const SPIRVType *ResType,
21622163
MachineInstr &I) const {
2163-
2164-
const auto Opcode =
2165-
STI.getTargetTriple().getVulkanVersion() < llvm::VersionTuple(1, 3)
2166-
? SPIRV::OpKill
2167-
: SPIRV::OpDemoteToHelperInvocation;
2164+
const auto Opcode = (STI.isAtLeastSPIRVVer(VersionTuple(1, 6)))
2165+
? SPIRV::OpDemoteToHelperInvocation
2166+
: SPIRV::OpKill;
21682167

21692168
MachineBasicBlock &BB = *I.getParent();
21702169
return BuildMI(BB, I, I.getDebugLoc(), TII.get(Opcode))

‎llvm/test/CodeGen/SPIRV/hlsl-intrinsics/clip.ll‎

Lines changed: 31 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2,17 +2,40 @@
22
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o - -filetype=obj | spirv-val %}
33

44

5-
; CHECK-LABEL: define void @test_dxil_lowering
6-
; CHECK: call void @dx.op.discard(i32 82, i1 %0)
7-
;
8-
define spir_func void @test_dxil_lowering(float noundef %Buf) #0 {
5+
define void @test_scalar_lowering(float noundef %Buf) {
96
entry:
107
%Buf.addr = alloca float, align 4
118
store float %Buf, ptr %Buf.addr, align 4
12-
%1 = load float, ptr %Buf.addr, align 4
13-
%2 = fcmp olt float %1, 0.000000e+00
14-
call void @llvm.spv.clip(i1 %2)
9+
%0 = load float, ptr %Buf.addr, align 4
10+
%1 = fcmp olt float %0, 0.000000e+00
11+
br i1 %1, label %lt0, label %end
12+
13+
lt0: ; preds = %entry
14+
call void @llvm.spv.clip()
15+
br label %end
16+
17+
end: ; preds = %lt0, %entry
18+
ret void
19+
}
20+
21+
declare void @llvm.spv.clip()
22+
23+
24+
define void @test_vector(<4 x float> noundef %Buf) {
25+
entry:
26+
%Buf.addr = alloca <4 x float>, align 16
27+
store <4 x float> %Buf, ptr %Buf.addr, align 16
28+
%1 = load <4 x float>, ptr %Buf.addr, align 16
29+
%2 = fcmp olt <4 x float> %1, zeroinitializer
30+
%3 = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> %2)
31+
br i1 %3, label %lt0, label %end
32+
33+
lt0: ; preds = %entry
34+
call void @llvm.spv.clip()
35+
br label %end
36+
37+
end: ; preds = %lt0, %entry
1538
ret void
1639
}
1740

18-
declare void @llvm.spv.clip(i1) #1
41+
declare i1 @llvm.vector.reduce.or.v4i1(<4 x i1>) #3

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