Add additional check to demonstrate E2E impact of this optimization

Author: TejaX-Alaghari

llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.ballot-assume-wave32.ll

@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -mtriple=amdgcn-amd-amdhsa -mattr=+wavefrontsize32 -passes=instcombine -S | FileCheck %s
+; RUN: opt < %s -mtriple=amdgcn-amd-amdhsa -mattr=+wavefrontsize32 -O2 -S | FileCheck %s --check-prefix=O2
 ;
 ; Wave32-specific tests for ballot-assume optimizations.
 ; - ballot.i32 should optimize (captures all 32 lanes)
@@ -25,6 +26,10 @@ define amdgpu_kernel void @wave32_ballot_i32_all_lanes(i32 %x, ptr addrspace(1)
 ; CHECK-NEXT:    ret void
 ; CHECK:       bar:
 ; CHECK-NEXT:    ret void
+;
+; O2-LABEL: @wave32_ballot_i32_all_lanes(
+; O2-NEXT:  common.ret:
+; O2-NEXT:    ret void
 ;
   %cmp = icmp eq i32 %x, 0
   %ballot = call i32 @llvm.amdgcn.ballot.i32(i1 %cmp)

llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.ballot-assume-wave64.ll

@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -mtriple=amdgcn-amd-amdhsa -mattr=+wavefrontsize64 -passes=instcombine -S | FileCheck %s
+; RUN: opt < %s -mtriple=amdgcn-amd-amdhsa -mattr=+wavefrontsize64 -O2 -S | FileCheck %s --check-prefix=O2
 ;
 ; Wave64-specific tests for ballot-assume optimizations.
 ; - ballot.i64 should optimize (captures all 64 lanes)
@@ -25,6 +26,10 @@ define amdgpu_kernel void @wave64_ballot_i64_all_lanes(i32 %x, ptr addrspace(1)
 ; CHECK-NEXT:    ret void
 ; CHECK:       bar:
 ; CHECK-NEXT:    ret void
+;
+; O2-LABEL: @wave64_ballot_i64_all_lanes(
+; O2-NEXT:  common.ret:
+; O2-NEXT:    ret void
 ;
   %cmp = icmp eq i32 %x, 0
   %ballot = call i64 @llvm.amdgcn.ballot.i64(i1 %cmp)