We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 920079b commit b707a7dCopy full SHA for b707a7d
llvm/test/CodeGen/WebAssembly/masked-shifts.ll
@@ -18,6 +18,23 @@ define i32 @shl_i32(i32 %v, i32 %x) {
18
ret i32 %a
19
}
20
21
+define i64 @shl_i64_i32(i64 %v, i32 %x) {
22
+; CHECK-LABEL: shl_i64_i32:
23
+; CHECK: .functype shl_i64_i32 (i64, i32) -> (i64)
24
+; CHECK-NEXT: # %bb.0:
25
+; CHECK-NEXT: local.get 0
26
+; CHECK-NEXT: local.get 1
27
+; CHECK-NEXT: i32.const 63
28
+; CHECK-NEXT: i32.and
29
+; CHECK-NEXT: i64.extend_i32_u
30
+; CHECK-NEXT: i64.shl
31
+; CHECK-NEXT: # fallthrough-return
32
+ %m = and i32 %x, 63
33
+ %z = zext i32 %m to i64
34
+ %a = shl i64 %v, %z
35
+ ret i64 %a
36
+}
37
+
38
define i32 @sra_i32(i32 %v, i32 %x) {
39
; CHECK-LABEL: sra_i32:
40
; CHECK: .functype sra_i32 (i32, i32) -> (i32)
0 commit comments