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1 parent bd606d9 commit b74a108Copy full SHA for b74a108
mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
@@ -684,8 +684,8 @@ Arguments<(ins AnyIntegerOrFloatOr1DVector:$src,
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- Swap the data between odd and even rows of 16 lanes (`swap_16`)
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- Swap the data between the first 32 lanes and the last 32 lanes (`swap_32`)
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- Format example:
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- ```
+ Example:
+ ```mlir
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%0 = amdgpu.permlane %src swap_16 : f16
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%1 = amdgpu.permlane %src swap_32 { fetch_inactive = true, bound_ctrl = true } : f16
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```
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