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MC: Remove redundant relocations for label differences
For the label difference A-B where A and B are in the same section, if the section contains no linker-relaxable instruction, we can disable the framnent walk code path (https://reviews.llvm.org/D155357), removing redundant relocations. This optimization is available since we now track per-section linker-relaxable instructions (#140692). lld/test/ELF/loongarch-reloc-leb128.s , introduced in #81133, has been updated in 9662a60 to prevent coverage loss.
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8 files changed

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-52
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8 files changed

+28
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‎llvm/include/llvm/MC/MCAsmBackend.h‎

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ class raw_ostream;
4141
/// Generic interface to target specific assembler backends.
4242
class MCAsmBackend {
4343
protected: // Can only create subclasses.
44-
MCAsmBackend(llvm::endianness Endian, bool LinkerRelaxation = false);
44+
MCAsmBackend(llvm::endianness Endian) : Endian(Endian) {}
4545

4646
MCAssembler *Asm = nullptr;
4747

@@ -56,10 +56,6 @@ class MCAsmBackend {
5656

5757
MCContext &getContext() const;
5858

59-
/// True for RISC-V and LoongArch. Relaxable relocations are marked with a
60-
/// RELAX relocation.
61-
bool allowLinkerRelaxation() const { return LinkerRelaxation; }
62-
6359
/// Return true if this target might automatically pad instructions and thus
6460
/// need to emit padding enable/disable directives around sensative code.
6561
virtual bool allowAutoPadding() const { return false; }
@@ -216,9 +212,6 @@ class MCAsmBackend {
216212
// Return STI for fragments of type MCRelaxableFragment and MCDataFragment
217213
// with hasInstructions() == true.
218214
static const MCSubtargetInfo *getSubtargetInfo(const MCFragment &F);
219-
220-
private:
221-
const bool LinkerRelaxation;
222215
};
223216

224217
} // end namespace llvm

‎llvm/lib/MC/MCAsmBackend.cpp‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,9 +24,6 @@
2424

2525
using namespace llvm;
2626

27-
MCAsmBackend::MCAsmBackend(llvm::endianness Endian, bool LinkerRelaxation)
28-
: Endian(Endian), LinkerRelaxation(LinkerRelaxation) {}
29-
3027
MCAsmBackend::~MCAsmBackend() = default;
3128

3229
MCContext &MCAsmBackend::getContext() const { return Asm->getContext(); }

‎llvm/lib/MC/MCExpr.cpp‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -319,12 +319,11 @@ static void attemptToFoldSymbolOffsetDifference(const MCAssembler *Asm,
319319
// When layout is available, we can generally compute the difference using the
320320
// getSymbolOffset path, which also avoids the possible slow fragment walk.
321321
// However, linker relaxation may cause incorrect fold of A-B if A and B are
322-
// separated by a linker-relaxable instruction. If the section contains
323-
// instructions and InSet is false (not expressions in directive like
324-
// .size/.fill), disable the fast path.
322+
// separated by a linker-relaxable fragment. If the section contains
323+
// linker-relaxable instruction and InSet is false (not expressions in
324+
// directive like .size/.fill), disable the fast path.
325325
bool Layout = Asm->hasLayout();
326-
if (Layout && (InSet || !SecA.hasInstructions() ||
327-
!Asm->getBackend().allowLinkerRelaxation())) {
326+
if (Layout && (InSet || !SecA.isLinkerRelaxable())) {
328327
// If both symbols are in the same fragment, return the difference of their
329328
// offsets. canGetFragmentOffset(FA) may be false.
330329
if (FA == FB && !SA.isVariable() && !SB.isVariable()) {

‎llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,8 @@ using namespace llvm;
3131
LoongArchAsmBackend::LoongArchAsmBackend(const MCSubtargetInfo &STI,
3232
uint8_t OSABI, bool Is64Bit,
3333
const MCTargetOptions &Options)
34-
: MCAsmBackend(llvm::endianness::little, /*LinkerRelaxation=*/true),
35-
STI(STI), OSABI(OSABI), Is64Bit(Is64Bit), TargetOptions(Options) {}
34+
: MCAsmBackend(llvm::endianness::little), STI(STI), OSABI(OSABI),
35+
Is64Bit(Is64Bit), TargetOptions(Options) {}
3636

3737
std::optional<MCFixupKind>
3838
LoongArchAsmBackend::getFixupKind(StringRef Name) const {

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,8 +37,8 @@ static cl::opt<bool> ULEB128Reloc(
3737

3838
RISCVAsmBackend::RISCVAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI,
3939
bool Is64Bit, const MCTargetOptions &Options)
40-
: MCAsmBackend(llvm::endianness::little, /*LinkerRelaxation=*/true),
41-
STI(STI), OSABI(OSABI), Is64Bit(Is64Bit), TargetOptions(Options) {
40+
: MCAsmBackend(llvm::endianness::little), STI(STI), OSABI(OSABI),
41+
Is64Bit(Is64Bit), TargetOptions(Options) {
4242
RISCVFeatures::validate(STI.getTargetTriple(), STI.getFeatureBits());
4343
}
4444

‎llvm/test/MC/RISCV/Relocations/align-non-executable.s‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919
# CHECK-NEXT: Section ({{.*}}) .rela.dummy {
2020
# CHECK-NEXT: 0x0 R_RISCV_CALL_PLT func 0x0
2121
# RELAX-NEXT: 0x0 R_RISCV_RELAX - 0x0
22-
# CHECK-NEXT: 0x8 R_RISCV_ADD64 .L2 0x0
23-
# CHECK-NEXT: 0x8 R_RISCV_SUB64 .L1 0x0
22+
# RELAX-NEXT: 0x8 R_RISCV_ADD64 .L2 0x0
23+
# RELAX-NEXT: 0x8 R_RISCV_SUB64 .L1 0x0
2424
# CHECK-NEXT: }
2525
# CHECK-NEXT: ]

‎llvm/test/MC/RISCV/Relocations/leb128.s‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,8 @@
2929

3030
# CHECK: Relocations [
3131
# CHECK-NEXT: .rela.alloc_w {
32-
# CHECK-NEXT: 0x0 R_RISCV_SET_ULEB128 w1 0x0
33-
# CHECK-NEXT: 0x0 R_RISCV_SUB_ULEB128 w 0x0
32+
# RELAX-NEXT: 0x0 R_RISCV_SET_ULEB128 w1 0x0
33+
# RELAX-NEXT: 0x0 R_RISCV_SUB_ULEB128 w 0x0
3434
# RELAX-NEXT: 0x1 R_RISCV_SET_ULEB128 w2 0x0
3535
# RELAX-NEXT: 0x1 R_RISCV_SUB_ULEB128 w1 0x0
3636
# CHECK-NEXT: 0x2 R_RISCV_CALL_PLT foo 0x0

‎llvm/test/MC/RISCV/cfi-advance.s‎

Lines changed: 15 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1,41 +1,28 @@
11
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax %s -o %t.o
2-
# RUN: llvm-readelf -sr %t.o | FileCheck %s --check-prefix=NORELAX
2+
# RUN: llvm-readelf -sr %t.o | FileCheck %s --check-prefixes=CHECK,NORELAX
33
# RUN: llvm-dwarfdump --debug-frame %t.o 2>&1 \
44
# RUN: | FileCheck -check-prefix=CHECK-DWARFDUMP %s
55
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax %s -o %t.relax.o
6-
# RUN: llvm-readelf -sr %t.relax.o | FileCheck %s --check-prefix=RELAX
6+
# RUN: llvm-readelf -sr %t.relax.o | FileCheck %s --check-prefixes=CHECK,RELAX
77

88
# NORELAX: Relocation section '.rela.text1' at offset {{.*}} contains 1 entries:
99
# NORELAX-NEXT: Offset Info Type Sym. Value Symbol's Name + Addend
1010
# NORELAX-NEXT: 00000000 00000313 R_RISCV_CALL_PLT 00000004 .L0 + 0
1111
# NORELAX-EMPTY:
12-
# NORELAX-NEXT: Relocation section '.rela.eh_frame' at offset {{.*}} contains 1 entries:
13-
# NORELAX: Offset Info Type Sym. Value Symbol's Name + Addend
14-
# NORELAX-NEXT: 0000001c 00000139 R_RISCV_32_PCREL 00000000 .L0 + 0
15-
# NORELAX-EMPTY:
16-
# NORELAX: Symbol table '.symtab' contains 13 entries:
17-
# NORELAX-NEXT: Num: Value Size Type Bind Vis Ndx Name
18-
# NORELAX-NEXT: 0: 00000000 0 NOTYPE LOCAL DEFAULT UND
19-
# NORELAX-NEXT: 1: 00000000 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
20-
# NORELAX: 3: 00000004 0 NOTYPE LOCAL DEFAULT 2 .L0{{$}}
21-
# NORELAX-NOT: .L0
22-
23-
# RELAX: Relocation section '.rela.eh_frame' at offset {{.*}} contains 5 entries:
24-
# RELAX-NEXT: Offset Info Type Sym. Value Symbol's Name + Addend
25-
# RELAX-NEXT: 0000001c 00000139 R_RISCV_32_PCREL 00000000 .L0 + 0
26-
# RELAX-NEXT: 00000020 00000c23 R_RISCV_ADD32 0001017a .L0 + 0
27-
# RELAX-NEXT: 00000020 00000127 R_RISCV_SUB32 00000000 .L0 + 0
28-
# RELAX-NEXT: 00000035 00000b35 R_RISCV_SET6 00010176 .L0 + 0
29-
# RELAX-NEXT: 00000035 00000934 R_RISCV_SUB6 0001016e .L0 + 0
12+
# RELAX: Relocation section '.rela.text1' at offset {{.*}} contains 2 entries:
13+
# RELAX: R_RISCV_CALL_PLT
14+
# RELAX-NEXT: R_RISCV_RELAX
3015
# RELAX-EMPTY:
31-
# RELAX: Symbol table '.symtab' contains 16 entries:
32-
# RELAX-NEXT: Num: Value Size Type Bind Vis Ndx Name
33-
# RELAX-NEXT: 0: 00000000 0 NOTYPE LOCAL DEFAULT UND
34-
# RELAX-NEXT: 1: 00000000 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
35-
# RELAX: 3: 00000004 0 NOTYPE LOCAL DEFAULT 2 .L0{{$}}
36-
# RELAX: 9: 0001016e 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
37-
# RELAX: 11: 00010176 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
38-
# RELAX: 12: 0001017a 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
16+
# CHECK-NEXT: Relocation section '.rela.eh_frame' at offset {{.*}} contains 1 entries:
17+
# CHECK: Offset Info Type Sym. Value Symbol's Name + Addend
18+
# CHECK-NEXT: 0000001c 00000139 R_RISCV_32_PCREL 00000000 .L0 + 0
19+
# CHECK-EMPTY:
20+
# CHECK: Symbol table '.symtab' contains 13 entries:
21+
# CHECK-NEXT: Num: Value Size Type Bind Vis Ndx Name
22+
# CHECK-NEXT: 0: 00000000 0 NOTYPE LOCAL DEFAULT UND
23+
# CHECK-NEXT: 1: 00000000 0 NOTYPE LOCAL DEFAULT 2 .L0 {{$}}
24+
# CHECK: 3: 00000004 0 NOTYPE LOCAL DEFAULT 2 .L0{{$}}
25+
# CHECK-NOT: .L0
3926

4027
# CHECK-DWARFDUMP: DW_CFA_advance_loc1: 104
4128
# CHECK-DWARFDUMP-NEXT: DW_CFA_def_cfa_offset: +8

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