use ST->hasVInstructions() and reduce if-nesting

Author: wecing

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

@@ -2140,9 +2140,9 @@ InstructionCost RISCVTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
   // Assume memory ops cost scale with the number of vector registers
   // possible accessed by the instruction.  Note that BasicTTI already
   // handles the LT.first term for us.
-  if (TLI->getSubtarget().hasVInstructions())
-    if (LT.second.isVector() && CostKind != TTI::TCK_CodeSize)
-      BaseCost *= TLI->getLMULCost(LT.second);
+  if (ST->hasVInstructions() && LT.second.isVector() &&
+      CostKind != TTI::TCK_CodeSize)
+    BaseCost *= TLI->getLMULCost(LT.second);
   return Cost + BaseCost;
 }