Capitalization

Author: rovka

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

@@ -3726,15 +3726,15 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
     if (FlagsValue.isZero()) {
       if (CLI.Args.size() > ChainCallArgIdx::Flags + 1)
         return lowerUnhandledCall(CLI, InVals,
-                                  "No additional args allowed if flags == 0");
+                                  "no additional args allowed if flags == 0");
     } else if (FlagsValue.isOneBitSet(0)) {
       if (CLI.Args.size() != ChainCallArgIdx::FallbackCallee + 1) {
-        return lowerUnhandledCall(CLI, InVals, "Expected 3 additional args");
+        return lowerUnhandledCall(CLI, InVals, "expected 3 additional args");
       }
 
       if (!Subtarget->isWave32()) {
         return lowerUnhandledCall(
-            CLI, InVals, "Dynamic VGPR mode is only supported for wave32");
+            CLI, InVals, "dynamic VGPR mode is only supported for wave32");
       }
 
       UsesDynamicVGPRs = true;

llvm/test/CodeGen/AMDGPU/unsupported-cs-chain.ll

@@ -3,7 +3,7 @@
 
 declare amdgpu_cs_chain void @callee() nounwind
 
-; CHECK: in function test_dvgpr void (): Dynamic VGPR mode is only supported for wave32
+; CHECK: in function test_dvgpr void (): dynamic VGPR mode is only supported for wave32
 define amdgpu_cs_chain void @test_dvgpr() {
   call void(ptr, i64, i32, i32, i32, ...) @llvm.amdgcn.cs.chain(ptr @callee, i64 -1, i32 inreg 1, i32 2, i32 1, i32 inreg 32, i32 inreg -1, ptr @callee)
   unreachable