@@ -3508,11 +3508,9 @@ InstructionCost VPWidenMemoryRecipe::computeCost(ElementCount VF,
35083508 const Align Alignment = getLoadStoreAlignment (&Ingredient);
35093509 unsigned AS = cast<PointerType>(Ctx.Types .inferScalarType (getAddr ()))
35103510 ->getAddressSpace ();
3511- unsigned Opcode =
3512- isa<VPWidenLoadRecipe, VPWidenLoadEVLRecipe, VPWidenStridedLoadRecipe>(
3513- this )
3514- ? Instruction::Load
3515- : Instruction::Store;
3511+ unsigned Opcode = isa<VPWidenLoadRecipe, VPWidenLoadEVLRecipe>(this )
3512+ ? Instruction::Load
3513+ : Instruction::Store;
35163514
35173515 if (!Consecutive) {
35183516 // TODO: Using the original IR may not be accurate.
@@ -3522,10 +3520,6 @@ InstructionCost VPWidenMemoryRecipe::computeCost(ElementCount VF,
35223520 " Inconsecutive memory access should not have the order." );
35233521
35243522 const Value *Ptr = getLoadStorePointerOperand (&Ingredient);
3525- if (isa<VPWidenStridedLoadRecipe>(this ))
3526- return Ctx.TTI .getStridedMemoryOpCost (
3527- Opcode, Ty, Ptr, IsMasked, Alignment, Ctx.CostKind , &Ingredient);
3528-
35293523 Type *PtrTy = Ptr->getType ();
35303524 // If the address value is uniform across all lanes, then the address can be
35313525 // calculated with scalar type and broadcast.
@@ -3708,6 +3702,16 @@ void VPWidenStridedLoadRecipe::execute(VPTransformState &State) {
37083702 State.set (this , NewLI);
37093703}
37103704
3705+ InstructionCost
3706+ VPWidenStridedLoadRecipe::computeCost (ElementCount VF,
3707+ VPCostContext &Ctx) const {
3708+ Type *Ty = toVectorTy (getLoadStoreType (&Ingredient), VF);
3709+ const Value *Ptr = getLoadStorePointerOperand (&Ingredient);
3710+ const Align Alignment = getLoadStoreAlignment (&Ingredient);
3711+ return Ctx.TTI .getStridedMemoryOpCost (Instruction::Load, Ty, Ptr, IsMasked,
3712+ Alignment, Ctx.CostKind , &Ingredient);
3713+ }
3714+
37113715#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
37123716void VPWidenStridedLoadRecipe::print (raw_ostream &O, const Twine &Indent,
37133717 VPSlotTracker &SlotTracker) const {
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