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[HLSL] Add RasterizerOrderedStructuredBuffer definition to HLSLExternalSemaSource
Adds RasterizerOrderedStructuredBuffer definition to HLSLExternalSemaSource. Adds separate tests for the AST shape and element types. Adds constructor/handle.fromBinding and subscript test cases to shared test file for structured buffers. Additional methods will be added later. Fixes #112776
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‎clang/lib/Sema/HLSLExternalSemaSource.cpp‎

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@@ -530,6 +530,18 @@ void HLSLExternalSemaSource::defineHLSLTypesWithForwardDeclarations() {
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.addArraySubscriptOperators()
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.completeDefinition();
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});
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Decl = BuiltinTypeDeclBuilder(*SemaPtr, HLSLNamespace,
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"RasterizerOrderedStructuredBuffer")
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.addSimpleTemplateParams(*SemaPtr, {"element_type"})
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.Record;
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onCompletion(Decl, [this](CXXRecordDecl *Decl) {
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setupBufferType(Decl, *SemaPtr, ResourceClass::UAV,
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ResourceKind::TypedBuffer, /*IsROV=*/true,
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/*RawBuffer=*/true)
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.addArraySubscriptOperators()
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.completeDefinition();
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});
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}
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void HLSLExternalSemaSource::onCompletion(CXXRecordDecl *Record,

‎clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl‎

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// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-library -x hlsl -ast-dump -DEMPTY %s | FileCheck -check-prefix=EMPTY %s
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// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-library -x hlsl -ast-dump %s | FileCheck %s
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// This test tests two different AST generations. The "EMPTY" test mode verifies
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// the AST generated by forward declaration of the HLSL types which happens on
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// initializing the HLSL external AST with an AST Context.
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// The non-empty mode has a use that requires the RasterizerOrderedStructuredBuffer type be complete,
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// which results in the AST being populated by the external AST source. That
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// case covers the full implementation of the template declaration and the
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// instantiated specialization.
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// EMPTY: ClassTemplateDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit RasterizerOrderedStructuredBuffer
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// EMPTY-NEXT: TemplateTypeParmDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> class depth 0 index 0 element_type
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// EMPTY-NEXT: CXXRecordDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit <undeserialized declarations> class RasterizerOrderedStructuredBuffer
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// EMPTY-NEXT: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
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// There should be no more occurrences of RasterizerOrderedStructuredBuffer
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// EMPTY-NOT: {{[^[:alnum:]]}}RasterizerOrderedStructuredBuffer
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#ifndef EMPTY
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RasterizerOrderedStructuredBuffer<int> Buffer;
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#endif
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// CHECK: ClassTemplateDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit RasterizerOrderedStructuredBuffer
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// CHECK-NEXT: TemplateTypeParmDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> class depth 0 index 0 element_type
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// CHECK-NEXT: CXXRecordDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit class RasterizerOrderedStructuredBuffer definition
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// CHECK: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
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// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
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// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
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// CHECK-SAME{LITERAL}: [[hlsl::is_rov]]
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// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
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// CHECK-SAME{LITERAL}: [[hlsl::contained_type(element_type)]]
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// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit TypedBuffer
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// CHECK: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &const (unsigned int) const'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> Idx 'unsigned int'
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// CHECK-NEXT: CompoundStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
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// CHECK-NEXT: ReturnStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
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// CHECK-NEXT: MemberExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'element_type' lvalue .e 0x{{[0-9A-Fa-f]+}}
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// CHECK-NEXT: CXXThisExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'const RasterizerOrderedStructuredBuffer<element_type>' lvalue implicit this
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// CHECK-NEXT: AlwaysInlineAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit always_inline
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// CHECK-NEXT: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &(unsigned int)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> Idx 'unsigned int'
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// CHECK-NEXT: CompoundStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
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// CHECK-NEXT: ReturnStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
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// CHECK-NEXT: MemberExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'element_type' lvalue .e 0x{{[0-9A-Fa-f]+}}
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// CHECK-NEXT: CXXThisExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'RasterizerOrderedStructuredBuffer<element_type>' lvalue implicit this
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// CHECK-NEXT: AlwaysInlineAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit always_inline
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// CHECK: ClassTemplateSpecializationDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> class RasterizerOrderedStructuredBuffer definition
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// CHECK: TemplateArgument type 'int'
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// CHECK-NEXT: BuiltinType 0x{{[0-9A-Fa-f]+}} 'int'
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// CHECK-NEXT: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
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// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
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// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
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// CHECK-SAME{LITERAL}: [[hlsl::is_rov]]
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// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
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// CHECK-SAME{LITERAL}: [[hlsl::contained_type(int)]]
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// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit TypedBuffer

‎clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl‎

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// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.2-compute -finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s
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// NOTE: The number in type name and whether the struct is packed or not will mostly
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// likely change once subscript operators are properly implemented (llvm/llvm-project#95956)
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// and theinterim field of the contained type is removed.
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer" = type <{ target("dx.RawBuffer", i16, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.0" = type <{ target("dx.RawBuffer", i16, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.2" = type { target("dx.RawBuffer", i32, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.3" = type { target("dx.RawBuffer", i32, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.4" = type { target("dx.RawBuffer", i64, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.5" = type { target("dx.RawBuffer", i64, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.6" = type <{ target("dx.RawBuffer", half, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.8" = type { target("dx.RawBuffer", float, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.9" = type { target("dx.RawBuffer", double, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.10" = type { target("dx.RawBuffer", <4 x i16>, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.11" = type { target("dx.RawBuffer", <3 x i32>, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.12" = type { target("dx.RawBuffer", <2 x half>, 1, 1)
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer.13" = type { target("dx.RawBuffer", <3 x float>, 1, 1)
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RasterizerOrderedStructuredBuffer<int16_t> BufI16;
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RasterizerOrderedStructuredBuffer<uint16_t> BufU16;
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RasterizerOrderedStructuredBuffer<int> BufI32;
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RasterizerOrderedStructuredBuffer<uint> BufU32;
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RasterizerOrderedStructuredBuffer<int64_t> BufI64;
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RasterizerOrderedStructuredBuffer<uint64_t> BufU64;
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RasterizerOrderedStructuredBuffer<half> BufF16;
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RasterizerOrderedStructuredBuffer<float> BufF32;
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RasterizerOrderedStructuredBuffer<double> BufF64;
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RasterizerOrderedStructuredBuffer< vector<int16_t, 4> > BufI16x4;
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RasterizerOrderedStructuredBuffer< vector<uint, 3> > BufU32x3;
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RasterizerOrderedStructuredBuffer<half2> BufF16x2;
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RasterizerOrderedStructuredBuffer<float3> BufF32x3;
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// TODO: RasterizerOrderedStructuredBuffer<snorm half> BufSNormF16;
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// TODO: RasterizerOrderedStructuredBuffer<unorm half> BufUNormF16;
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// TODO: RasterizerOrderedStructuredBuffer<snorm float> BufSNormF32;
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// TODO: RasterizerOrderedStructuredBuffer<unorm float> BufUNormF32;
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// TODO: RasterizerOrderedStructuredBuffer<snorm double> BufSNormF64;
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// TODO: RasterizerOrderedStructuredBuffer<unorm double> BufUNormF64;
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[numthreads(1,1,1)]
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void main(int GI : SV_GroupIndex) {
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BufI16[GI] = 0;
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BufU16[GI] = 0;
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BufI32[GI] = 0;
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BufU32[GI] = 0;
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BufI64[GI] = 0;
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BufU64[GI] = 0;
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BufF16[GI] = 0;
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BufF32[GI] = 0;
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BufF64[GI] = 0;
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BufI16x4[GI] = 0;
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BufU32x3[GI] = 0;
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BufF16x2[GI] = 0;
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BufF32x3[GI] = 0;
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}
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// CHECK: !{{[0-9]+}} = !{ptr @BufI16, i32 10, i32 2,
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// CHECK: !{{[0-9]+}} = !{ptr @BufU16, i32 10, i32 3,
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// CHECK: !{{[0-9]+}} = !{ptr @BufI32, i32 10, i32 4,
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// CHECK: !{{[0-9]+}} = !{ptr @BufU32, i32 10, i32 5,
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// CHECK: !{{[0-9]+}} = !{ptr @BufI64, i32 10, i32 6,
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// CHECK: !{{[0-9]+}} = !{ptr @BufU64, i32 10, i32 7,
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// CHECK: !{{[0-9]+}} = !{ptr @BufF16, i32 10, i32 8,
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// CHECK: !{{[0-9]+}} = !{ptr @BufF32, i32 10, i32 9,
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// CHECK: !{{[0-9]+}} = !{ptr @BufF64, i32 10, i32 10,
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// CHECK: !{{[0-9]+}} = !{ptr @BufI16x4, i32 10, i32 2,
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// CHECK: !{{[0-9]+}} = !{ptr @BufU32x3, i32 10, i32 5,
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// CHECK: !{{[0-9]+}} = !{ptr @BufF16x2, i32 10, i32 8,
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// CHECK: !{{[0-9]+}} = !{ptr @BufF32x3, i32 10, i32 9,

‎clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl‎

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@@ -5,17 +5,22 @@
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StructuredBuffer<float> Buf : register(t10);
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RWStructuredBuffer<float> Buf2 : register(u5, space1);
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RasterizerOrderedStructuredBuffer<float> Buf5 : register(u1, space2);
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// CHECK: %"class.hlsl::StructuredBuffer" = type { target("dx.RawBuffer", float, 0, 0), float }
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// CHECK: %"class.hlsl::RWStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 0), float }
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// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 1), float }
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// CHECK: @Buf = global %"class.hlsl::StructuredBuffer" zeroinitializer, align 4
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// CHECK: @Buf2 = global %"class.hlsl::RWStructuredBuffer" zeroinitializer, align 4
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// CHECK: @Buf5 = global %"class.hlsl::RasterizerOrderedStructuredBuffer" zeroinitializer, align 4
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// CHECK: define linkonce_odr void @_ZN4hlsl16StructuredBufferIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(8) %this)
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// CHECK-NEXT: entry:
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// CHECK: define linkonce_odr void @_ZN4hlsl18RWStructuredBufferIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(8) %this)
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// CHECK-NEXT: entry:
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// CHECK: define linkonce_odr void @_ZN4hlsl33RasterizerOrderedStructuredBufferIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(8) %this)
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// CHECK-NEXT: entry:
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// CHECK: define internal void @_GLOBAL__sub_I_StructuredBuffers_constructors.hlsl()
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// CHECK: entry:
@@ -27,7 +32,11 @@ RWStructuredBuffer<float> Buf2 : register(u5, space1);
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// CHECK-DXIL-NEXT: store target("dx.RawBuffer", float, 0, 0) %Buf_h, ptr @Buf, align 4
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// CHECK-DXIL-NEXT: %Buf2_h = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.handle.fromBinding.tdx.RawBuffer_f32_1_0t(i32 1, i32 5, i32 1, i32 0, i1 false)
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// CHECK-DXIL-NEXT: store target("dx.RawBuffer", float, 1, 0) %Buf2_h, ptr @Buf2, align 4
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// CHECK-DXIL-NEXT: %Buf5_h = call target("dx.RawBuffer", float, 1, 1) @llvm.dx.handle.fromBinding.tdx.RawBuffer_f32_1_1t(i32 2, i32 1, i32 1, i32 0, i1 false)
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// CHECK-DXIL-NEXT: store target("dx.RawBuffer", float, 1, 1) %Buf5_h, ptr @Buf5, align 4
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// CHECK-SPIRV-NEXT: %Buf_h = call target("dx.RawBuffer", float, 0, 0) @llvm.spv.handle.fromBinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 10, i32 1, i32 0, i1 false)
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// CHECK-SPIRV-NEXT: store target("dx.RawBuffer", float, 0, 0) %Buf_h, ptr @Buf", align 4
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// CHECK-SPIRV-NEXT: %Buf2_h = call target("dx.RawBuffer", float, 1, 0) @llvm.spv.handle.fromBinding.tdx.RawBuffer_f32_1_0t(i32 1, i32 5, i32 1, i32 0, i1 false)
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// CHECK-SPIRV-NEXT: store target("dx.RawBuffer", float, 1, 0) %Buf2_h, ptr @Buf2", align 4
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// CHECK-SPIRV-NEXT: %Buf5_h = call target("dx.RawBuffer", float, 1, 1) @llvm.spv.handle.fromBinding.tdx.RawBuffer_f32_1_1t(i32 2, i32 1, i32 1, i32 0, i1 false)
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// CHECK-SPIRV-NEXT: store target("dx.RawBuffer", float, 1, 1) %Buf5_h, ptr @Buf5, align 4

‎clang/test/CodeGenHLSL/builtins/StructuredBuffers-subscripts.hlsl‎

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@@ -1,11 +1,13 @@
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// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -emit-llvm -o - -O0 %s | FileCheck %s
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StructuredBuffer<int> In;
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RWStructuredBuffer<int> Out;
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RWStructuredBuffer<int> Out1;
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RasterizerOrderedStructuredBuffer<int> Out2;
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[numthreads(1,1,1)]
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void main(unsigned GI : SV_GroupIndex) {
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Out[GI] = In[GI];
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Out1[GI] = In[GI];
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Out2[GI] = In[GI];
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}
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// Even at -O0 the subscript operators get inlined. The -O0 IR is a bit messy

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