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author
Tony Tao
committed
rebase updates
1 parent 5a89dd5 commit b9b2d42

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4 files changed

+43
-92
lines changed

4 files changed

+43
-92
lines changed

‎clang/lib/Basic/TargetInfo.cpp‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1113,6 +1113,14 @@ void TargetInfo::copyAuxTarget(const TargetInfo *Aux) {
11131113
std::string
11141114
TargetInfo::simplifyConstraint(StringRef Constraint,
11151115
SmallVectorImpl<ConstraintInfo> *OutCons) const {
1116+
// If we have only the {...} constraint, do not do any simplifications. This
1117+
// already maps to the lower level LLVM inline assembly IR that tells the
1118+
// backend to allocate a specific register. Any validations would have already
1119+
// been done in the Sema stage or will be done in the AddVariableConstraints
1120+
// function.
1121+
if (Constraint[0] == '{' || (Constraint[0] == '&' && Constraint[1] == '{'))
1122+
return std::string(Constraint);
1123+
11161124
std::string Result;
11171125

11181126
for (const char *I = Constraint.begin(), *E = Constraint.end(); I < E; I++) {

‎clang/lib/CodeGen/CGStmt.cpp‎

Lines changed: 0 additions & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -2471,63 +2471,6 @@ void CodeGenFunction::EmitSwitchStmt(const SwitchStmt &S) {
24712471
CaseRangeBlock = SavedCRBlock;
24722472
}
24732473

2474-
static std::string SimplifyConstraint(
2475-
const char *Constraint, const TargetInfo &Target,
2476-
SmallVectorImpl<TargetInfo::ConstraintInfo> *OutCons = nullptr) {
2477-
// If we have only the {...} constraint, do not do any simplifications. This
2478-
// already maps to the lower level LLVM inline assembly IR that tells the
2479-
// backend to allocate a specific register. Any validations would have already
2480-
// been done in the Sema stage or will be done in the AddVariableConstraints
2481-
// function.
2482-
if (Constraint[0] == '{' || (Constraint[0] == '&' && Constraint[1] == '{'))
2483-
return std::string(Constraint);
2484-
2485-
std::string Result;
2486-
2487-
while (*Constraint) {
2488-
switch (*Constraint) {
2489-
default:
2490-
Result += Target.convertConstraint(Constraint);
2491-
break;
2492-
// Ignore these
2493-
case '*':
2494-
case '?':
2495-
case '!':
2496-
case '=': // Will see this and the following in mult-alt constraints.
2497-
case '+':
2498-
break;
2499-
case '#': // Ignore the rest of the constraint alternative.
2500-
while (Constraint[1] && Constraint[1] != ',')
2501-
Constraint++;
2502-
break;
2503-
case '&':
2504-
case '%':
2505-
Result += *Constraint;
2506-
while (Constraint[1] && Constraint[1] == *Constraint)
2507-
Constraint++;
2508-
break;
2509-
case ',':
2510-
Result += "|";
2511-
break;
2512-
case 'g':
2513-
Result += "imr";
2514-
break;
2515-
case '[': {
2516-
assert(OutCons &&
2517-
"Must pass output names to constraints with a symbolic name");
2518-
unsigned Index;
2519-
bool result = Target.resolveSymbolicName(Constraint, *OutCons, Index);
2520-
assert(result && "Could not resolve symbolic name"); (void)result;
2521-
Result += llvm::utostr(Index);
2522-
break;
2523-
}
2524-
}
2525-
2526-
Constraint++;
2527-
}
2528-
2529-
return Result;
2530-
}
25312474
/// Is it valid to apply a register constraint for a variable marked with
25322475
/// the "register asm" construct?
25332476
/// Optionally, if it is determined that we can, we set "Register" to the

‎clang/test/CodeGen/ms-intrinsics.c‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -36,64 +36,64 @@ void test__movsb(unsigned char *Dest, unsigned char *Src, size_t Count) {
3636
return __movsb(Dest, Src, Count);
3737
}
3838
// CHECK-I386-LABEL: define{{.*}} void @test__movsb
39-
// CHECK-I386: tail call { ptr, ptr, i32 } asm sideeffect "xchg $(%esi, $1$|$1, esi$)\0Arep movsb\0Axchg $(%esi, $1$|$1, esi$)", "={di},=r,={cx},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i32 %Count)
39+
// CHECK-I386: tail call { ptr, ptr, i32 } asm sideeffect "xchg $(%esi, $1$|$1, esi$)\0Arep movsb\0Axchg $(%esi, $1$|$1, esi$)", "={di},=r,={cx},{di},1,{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i32 %Count)
4040
// CHECK-I386: ret void
4141
// CHECK-I386: }
4242

4343
// CHECK-X64-LABEL: define{{.*}} void @test__movsb
44-
// CHECK-X64: call { ptr, ptr, i64 } asm sideeffect "rep movsb", "={di},={si},={cx},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i64 %Count)
44+
// CHECK-X64: call { ptr, ptr, i64 } asm sideeffect "rep movsb", "={di},={si},={cx},{di},{si},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i64 %Count)
4545
// CHECK-X64: ret void
4646
// CHECK-X64: }
4747

4848
void test__stosw(unsigned short *Dest, unsigned short Data, size_t Count) {
4949
return __stosw(Dest, Data, Count);
5050
}
5151
// CHECK-I386-LABEL: define{{.*}} void @test__stosw
52-
// CHECK-I386: call { ptr, i32 } asm sideeffect "rep stosw", "={di},={cx},{ax},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i16 %Data, ptr %Dest, i32 %Count)
52+
// CHECK-I386: call { ptr, i32 } asm sideeffect "rep stosw", "={di},={cx},{ax},{di},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 %Data, ptr %Dest, i32 %Count)
5353
// CHECK-I386: ret void
5454
// CHECK-I386: }
5555

5656
// CHECK-X64-LABEL: define{{.*}} void @test__stosw
57-
// CHECK-X64: call { ptr, i64 } asm sideeffect "rep stosw", "={di},={cx},{ax},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i16 %Data, ptr %Dest, i64 %Count)
57+
// CHECK-X64: call { ptr, i64 } asm sideeffect "rep stosw", "={di},={cx},{ax},{di},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 %Data, ptr %Dest, i64 %Count)
5858
// CHECK-X64: ret void
5959
// CHECK-X64: }
6060

6161
void test__movsw(unsigned short *Dest, unsigned short *Src, size_t Count) {
6262
return __movsw(Dest, Src, Count);
6363
}
6464
// CHECK-I386-LABEL: define{{.*}} void @test__movsw
65-
// CHECK-I386: tail call { ptr, ptr, i32 } asm sideeffect "xchg $(%esi, $1$|$1, esi$)\0Arep movsw\0Axchg $(%esi, $1$|$1, esi$)", "={di},=r,={cx},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i32 %Count)
65+
// CHECK-I386: tail call { ptr, ptr, i32 } asm sideeffect "xchg $(%esi, $1$|$1, esi$)\0Arep movsw\0Axchg $(%esi, $1$|$1, esi$)", "={di},=r,={cx},{di},1,{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i32 %Count)
6666
// CHECK-I386: ret void
6767
// CHECK-I386: }
6868

6969
// CHECK-X64-LABEL: define{{.*}} void @test__movsw
70-
// CHECK-X64: call { ptr, ptr, i64 } asm sideeffect "rep movsw", "={di},={si},={cx},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i64 %Count)
70+
// CHECK-X64: call { ptr, ptr, i64 } asm sideeffect "rep movsw", "={di},={si},={cx},{di},{si},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i64 %Count)
7171
// CHECK-X64: ret void
7272
// CHECK-X64: }
7373

7474
void test__stosd(unsigned long *Dest, unsigned long Data, size_t Count) {
7575
return __stosd(Dest, Data, Count);
7676
}
7777
// CHECK-I386-LABEL: define{{.*}} void @test__stosd
78-
// CHECK-I386: call { ptr, i32 } asm sideeffect "rep stos$(l$|d$)", "={di},={cx},{ax},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %Data, ptr %Dest, i32 %Count)
78+
// CHECK-I386: call { ptr, i32 } asm sideeffect "rep stos$(l$|d$)", "={di},={cx},{ax},{di},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %Data, ptr %Dest, i32 %Count)
7979
// CHECK-I386: ret void
8080
// CHECK-I386: }
8181

8282
// CHECK-X64-LABEL: define{{.*}} void @test__stosd
83-
// CHECK-X64: call { ptr, i64 } asm sideeffect "rep stos$(l$|d$)", "={di},={cx},{ax},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %Data, ptr %Dest, i64 %Count)
83+
// CHECK-X64: call { ptr, i64 } asm sideeffect "rep stos$(l$|d$)", "={di},={cx},{ax},{di},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %Data, ptr %Dest, i64 %Count)
8484
// CHECK-X64: ret void
8585
// CHECK-X64: }
8686

8787
void test__movsd(unsigned long *Dest, unsigned long *Src, size_t Count) {
8888
return __movsd(Dest, Src, Count);
8989
}
9090
// CHECK-I386-LABEL: define{{.*}} void @test__movsd
91-
// CHECK-I386: tail call { ptr, ptr, i32 } asm sideeffect "xchg $(%esi, $1$|$1, esi$)\0Arep movs$(l$|d$)\0Axchg $(%esi, $1$|$1, esi$)", "={di},=r,={cx},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i32 %Count)
91+
// CHECK-I386: tail call { ptr, ptr, i32 } asm sideeffect "xchg $(%esi, $1$|$1, esi$)\0Arep movs$(l$|d$)\0Axchg $(%esi, $1$|$1, esi$)", "={di},=r,={cx},{di},1,{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i32 %Count)
9292
// CHECK-I386: ret void
9393
// CHECK-I386: }
9494

9595
// CHECK-X64-LABEL: define{{.*}} void @test__movsd
96-
// CHECK-X64: call { ptr, ptr, i64 } asm sideeffect "rep movs$(l$|d$)", "={di},={si},={cx},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i64 %Count)
96+
// CHECK-X64: call { ptr, ptr, i64 } asm sideeffect "rep movs$(l$|d$)", "={di},={si},={cx},{di},{si},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i64 %Count)
9797
// CHECK-X64: ret void
9898
// CHECK-X64: }
9999

@@ -102,15 +102,15 @@ void test__stosq(unsigned __int64 *Dest, unsigned __int64 Data, size_t Count) {
102102
return __stosq(Dest, Data, Count);
103103
}
104104
// CHECK-X64-LABEL: define{{.*}} void @test__stosq
105-
// CHECK-X64: call { ptr, i64 } asm sideeffect "rep stosq", "={di},={cx},{ax},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %Data, ptr %Dest, i64 %Count)
105+
// CHECK-X64: call { ptr, i64 } asm sideeffect "rep stosq", "={di},={cx},{ax},{di},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %Data, ptr %Dest, i64 %Count)
106106
// CHECK-X64: ret void
107107
// CHECK-X64: }
108108

109109
void test__movsq(unsigned __int64 *Dest, unsigned __int64 *Src, size_t Count) {
110110
return __movsq(Dest, Src, Count);
111111
}
112112
// CHECK-X64-LABEL: define{{.*}} void @test__movsq
113-
// CHECK-X64: call { ptr, ptr, i64 } asm sideeffect "rep movsq", "={di},={si},={cx},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i64 %Count)
113+
// CHECK-X64: call { ptr, ptr, i64 } asm sideeffect "rep movsq", "={di},={si},={cx},{di},{si},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %Dest, ptr %Src, i64 %Count)
114114
// CHECK-X64: ret void
115115
// CHECK-X64: }
116116
#endif
@@ -698,13 +698,13 @@ long test_InterlockedExchange_HLERelease(long volatile *Target, long Value) {
698698
long test_InterlockedCompareExchange_HLEAcquire(long volatile *Destination,
699699
long Exchange, long Comparand) {
700700
// CHECK-INTEL: define{{.*}} i32 @test_InterlockedCompareExchange_HLEAcquire(ptr{{.*}}%Destination, i32{{[a-z_ ]*}}%Exchange, i32{{[a-z_ ]*}}%Comparand)
701-
// CHECK-INTEL: call i32 asm sideeffect ".byte 0xf2 ; lock ; cmpxchg $($2, $1$|$1, $2$)", "={ax},=*m,r,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %Destination, i32 %Exchange, i32 %Comparand, ptr elementtype(i32) %Destination)
701+
// CHECK-INTEL: call i32 asm sideeffect ".byte 0xf2 ; lock ; cmpxchg $($2, $1$|$1, $2$)", "={ax},=*m,r,{ax},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %Destination, i32 %Exchange, i32 %Comparand, ptr elementtype(i32) %Destination)
702702
return _InterlockedCompareExchange_HLEAcquire(Destination, Exchange, Comparand);
703703
}
704704
long test_InterlockedCompareExchange_HLERelease(long volatile *Destination,
705705
long Exchange, long Comparand) {
706706
// CHECK-INTEL: define{{.*}} i32 @test_InterlockedCompareExchange_HLERelease(ptr{{.*}}%Destination, i32{{[a-z_ ]*}}%Exchange, i32{{[a-z_ ]*}}%Comparand)
707-
// CHECK-INTEL: call i32 asm sideeffect ".byte 0xf3 ; lock ; cmpxchg $($2, $1$|$1, $2$)", "={ax},=*m,r,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %Destination, i32 %Exchange, i32 %Comparand, ptr elementtype(i32) %Destination)
707+
// CHECK-INTEL: call i32 asm sideeffect ".byte 0xf3 ; lock ; cmpxchg $($2, $1$|$1, $2$)", "={ax},=*m,r,{ax},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %Destination, i32 %Exchange, i32 %Comparand, ptr elementtype(i32) %Destination)
708708
return _InterlockedCompareExchange_HLERelease(Destination, Exchange, Comparand);
709709
}
710710
#endif
@@ -722,13 +722,13 @@ __int64 test_InterlockedExchange64_HLERelease(__int64 volatile *Target, __int64
722722
__int64 test_InterlockedCompareExchange64_HLEAcquire(__int64 volatile *Destination,
723723
__int64 Exchange, __int64 Comparand) {
724724
// CHECK-X64: define{{.*}} i64 @test_InterlockedCompareExchange64_HLEAcquire(ptr{{.*}}%Destination, i64{{[a-z_ ]*}}%Exchange, i64{{[a-z_ ]*}}%Comparand)
725-
// CHECK-X64: call i64 asm sideeffect ".byte 0xf2 ; lock ; cmpxchg $($2, $1$|$1, $2$)", "={ax},=*m,r,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i64) %Destination, i64 %Exchange, i64 %Comparand, ptr elementtype(i64) %Destination)
725+
// CHECK-X64: call i64 asm sideeffect ".byte 0xf2 ; lock ; cmpxchg $($2, $1$|$1, $2$)", "={ax},=*m,r,{ax},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i64) %Destination, i64 %Exchange, i64 %Comparand, ptr elementtype(i64) %Destination)
726726
return _InterlockedCompareExchange64_HLEAcquire(Destination, Exchange, Comparand);
727727
}
728728
__int64 test_InterlockedCompareExchange64_HLERelease(__int64 volatile *Destination,
729729
__int64 Exchange, __int64 Comparand) {
730730
// CHECK-X64: define{{.*}} i64 @test_InterlockedCompareExchange64_HLERelease(ptr{{.*}}%Destination, i64{{[a-z_ ]*}}%Exchange, i64{{[a-z_ ]*}}%Comparand)
731-
// CHECK-X64: call i64 asm sideeffect ".byte 0xf3 ; lock ; cmpxchg $($2, $1$|$1, $2$)", "={ax},=*m,r,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i64) %Destination, i64 %Exchange, i64 %Comparand, ptr elementtype(i64) %Destination)
731+
// CHECK-X64: call i64 asm sideeffect ".byte 0xf3 ; lock ; cmpxchg $($2, $1$|$1, $2$)", "={ax},=*m,r,{ax},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i64) %Destination, i64 %Exchange, i64 %Comparand, ptr elementtype(i64) %Destination)
732732
return _InterlockedCompareExchange64_HLERelease(Destination, Exchange, Comparand);
733733
}
734734
#endif

‎llvm/test/CodeGen/SystemZ/zos-inline-asm.ll‎

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -106,10 +106,10 @@
106106
define hidden void @f1() {
107107
; CHECK-LABEL: f1:
108108
; CHECK: *APP
109-
; CHECK-NEXT: lhi 1, 5
109+
; CHECK-NEXT: lhi 1,5
110110
; CHECK: *NO_APP
111111
; CHECK: *APP
112-
; CHECK-NEXT: lgr 1, 2
112+
; CHECK-NEXT: lgr 1,2
113113
; CHECK: *NO_APP
114114
entry:
115115
%a = alloca i32, align 4
@@ -125,7 +125,7 @@ entry:
125125
define hidden void @f2() {
126126
; CHECK-LABEL: f2:
127127
; CHECK: *APP
128-
; CHECK-NEXT: stg 1, {{.*}}(4)
128+
; CHECK-NEXT: stg 1,{{.*}}(4,0)
129129
; CHECK: *NO_APP
130130
entry:
131131
%a = alloca i32, align 4
@@ -137,8 +137,8 @@ entry:
137137

138138
define hidden void @f3() {
139139
; CHECK-LABEL: f3:
140-
; CHECK: l 1, {{.*}}(4)
141-
; CHECK: lhi 15, 25
140+
; CHECK: l 1,{{.*}}(4)
141+
; CHECK: lhi 15,25
142142
; CHECK: *APP
143143
; CHECK-NEXT: svc 109
144144
; CHECK: *NO_APP
@@ -156,9 +156,9 @@ define hidden void @f4() {
156156
; CHECK: *APP
157157
; CHECK-NEXT: pc 0
158158
; CHECK: *NO_APP
159-
; CHECK: stg 0, {{.*}}(4)
160-
; CHECK-NEXT: stg 1, {{.*}}(4)
161-
; CHECK-NEXT: stg 15, {{.*}}(4)
159+
; CHECK: stg 0,{{.*}}(4)
160+
; CHECK-NEXT: stg 1,{{.*}}(4)
161+
; CHECK-NEXT: stg 15,{{.*}}(4)
162162
entry:
163163
%parm = alloca ptr, align 8
164164
%rc = alloca i64, align 8
@@ -179,16 +179,16 @@ entry:
179179
define hidden void @f5() {
180180
; CHECK-LABEL: f5:
181181
; CHECK: *APP
182-
; CHECK-NEXT: lhi {{[0-9]}}, 10
183-
; CHECK-NEXT: ar {{[0-9]}}, {{[0-9]}}
182+
; CHECK-NEXT: lhi {{[0-9]}},10
183+
; CHECK-NEXT: ar {{[0-9]}},{{[0-9]}}
184184
; CHECK: *NO_APP
185185
; CHECK: *APP
186-
; CHECK-NEXT: lhi 2, 10
187-
; CHECK-NEXT: ar 2, 2
186+
; CHECK-NEXT: lhi 2,10
187+
; CHECK-NEXT: ar 2,2
188188
; CHECK: *NO_APP
189189
; CHECK: *APP
190-
; CHECK-NEXT: lhi 2, 10
191-
; CHECK-NEXT: ar 2, 2
190+
; CHECK-NEXT: lhi 2,10
191+
; CHECK-NEXT: ar 2,2
192192
; CHECK: *NO_APP
193193
entry:
194194
%a = alloca i32, align 4
@@ -206,7 +206,7 @@ entry:
206206
define hidden void @f7() {
207207
; CHECK-LABEL: f7:
208208
; CHECK: *APP
209-
; CHECK-NEXT: alr {{[0-9]}}, {{[0-9]}}
209+
; CHECK-NEXT: alr {{[0-9]}},{{[0-9]}}
210210
; CHECK-NEXT: {{.*}}:
211211
; CHECK-NEXT: jo {{.*}}-4
212212
; CHECK: *NO_APP
@@ -226,15 +226,15 @@ entry:
226226
define hidden signext i32 @f8() {
227227
; CHECK-LABEL: f8:
228228
; CHECK: *APP
229-
; CHECK-NEXT: lhi 1, 5
229+
; CHECK-NEXT: lhi 1,5
230230
; CHECK: *NO_APP
231231
; CHECK: *APP
232-
; CHECK-NEXT: lgr 2, 1
232+
; CHECK-NEXT: lgr 2,1
233233
; CHECK: *NO_APP
234234
; CHECK: *APP
235-
; CHECK-NEXT: stg 2, {{.*}}(4)
235+
; CHECK-NEXT: stg 2,{{.*}}(4,0)
236236
; CHECK: *NO_APP
237-
; CHECK: lgf 3, {{.*}}(4)
237+
; CHECK: lgf 3,{{.*}}(4)
238238
entry:
239239
%a = alloca i32, align 4
240240
%b = alloca i32, align 4

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