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[𝘀𝗽𝗿] initial version
Created using spr 1.3.6-beta.1
2 parents 122e515 + f2327fa commit b9cf383

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2 files changed

+15
-3
lines changed

2 files changed

+15
-3
lines changed

llvm/lib/CodeGen/LiveRangeShrink.cpp

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -95,14 +95,24 @@ static MachineInstr *FindDominatedInstruction(MachineInstr &New,
9595
return Old;
9696
}
9797

98+
static bool isCodeMotionBarrier(MachineInstr &MI) {
99+
return MI.hasUnmodeledSideEffects() && !MI.isPseudoProbe();
100+
}
101+
98102
/// Builds Instruction to its dominating order number map \p M by traversing
99103
/// from instruction \p Start.
100104
static void BuildInstOrderMap(MachineBasicBlock::iterator Start,
101105
InstOrderMap &M) {
102106
M.clear();
103107
unsigned i = 0;
104-
for (MachineInstr &I : make_range(Start, Start->getParent()->end()))
108+
bool SawStore = false;
109+
for (MachineInstr &I : make_range(Start, Start->getParent()->end())) {
110+
if (I.mayStore())
111+
SawStore = true;
112+
if (!I.isSafeToMove(SawStore) && isCodeMotionBarrier(I))
113+
break;
105114
M[&I] = i++;
115+
}
106116
}
107117

108118
bool LiveRangeShrink::runOnMachineFunction(MachineFunction &MF) {
@@ -166,8 +176,7 @@ bool LiveRangeShrink::runOnMachineFunction(MachineFunction &MF) {
166176
// If MI has side effects, it should become a barrier for code motion.
167177
// IOM is rebuild from the next instruction to prevent later
168178
// instructions from being moved before this MI.
169-
if (MI.hasUnmodeledSideEffects() && !MI.isPseudoProbe() &&
170-
Next != MBB.end()) {
179+
if (isCodeMotionBarrier(MI) && Next != MBB.end()) {
171180
BuildInstOrderMap(Next, IOM);
172181
SawStore = false;
173182
}

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -967,6 +967,9 @@ static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
967967
case ISD::INTRINSIC_W_CHAIN:
968968
// Handled by MemIntrinsicSDNode check after the switch.
969969
break;
970+
case ISD::MDNODE_SDNODE:
971+
ID.AddPointer(cast<MDNodeSDNode>(N)->getMD());
972+
break;
970973
} // end switch (N->getOpcode())
971974

972975
// MemIntrinsic nodes could also have subclass data, address spaces, and flags

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