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Add the eor instruction in the failure BB
1 parent 9dfdc66 commit ba7a7c6

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7 files changed

+36
-10
lines changed

7 files changed

+36
-10
lines changed

llvm/include/llvm/CodeGen/TargetLowering.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5770,7 +5770,7 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
57705770
virtual bool useLoadStackGuardNode(const Module &M) const { return false; }
57715771

57725772
virtual SDValue emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val,
5773-
const SDLoc &DL) const {
5773+
const SDLoc &DL, bool FailureBB) const {
57745774
llvm_unreachable("not implemented for this target");
57755775
}
57765776

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3087,7 +3087,7 @@ void SelectionDAGBuilder::visitSPDescriptorParent(StackProtectorDescriptor &SPD,
30873087
MachineMemOperand::MOVolatile);
30883088

30893089
if (TLI.useStackGuardXorFP())
3090-
GuardVal = TLI.emitStackGuardXorFP(DAG, GuardVal, dl);
3090+
GuardVal = TLI.emitStackGuardXorFP(DAG, GuardVal, dl, false);
30913091

30923092
// If we're using function-based instrumentation, call the guard check
30933093
// function
@@ -3192,7 +3192,7 @@ void SelectionDAGBuilder::visitSPDescriptorFailure(
31923192
MachineMemOperand::MOVolatile);
31933193

31943194
if (TLI.useStackGuardXorFP())
3195-
GuardVal = TLI.emitStackGuardXorFP(DAG, GuardVal, dl);
3195+
GuardVal = TLI.emitStackGuardXorFP(DAG, GuardVal, dl, true);
31963196

31973197
// The target provides a guard check function to validate the guard value.
31983198
// Generate a call to that function with the content of the guard slot as
@@ -7354,7 +7354,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
73547354
MachineMemOperand::MOVolatile);
73557355
}
73567356
if (TLI.useStackGuardXorFP())
7357-
Res = TLI.emitStackGuardXorFP(DAG, Res, sdl);
7357+
Res = TLI.emitStackGuardXorFP(DAG, Res, sdl, false);
73587358
DAG.setRoot(Chain);
73597359
setValue(&I, Res);
73607360
return;

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28968,6 +28968,25 @@ bool AArch64TargetLowering::useLoadStackGuardNode(const Module &M) const {
2896828968
return true;
2896928969
}
2897028970

28971+
bool AArch64TargetLowering::useStackGuardXorFP() const {
28972+
// Currently only MSVC CRTs XOR the frame pointer into the stack guard value.
28973+
return Subtarget->getTargetTriple().isOSMSVCRT() &&
28974+
!Subtarget->isTargetMachO() &&
28975+
!getTargetMachine().Options.EnableGlobalISel;
28976+
}
28977+
28978+
SDValue AArch64TargetLowering::emitStackGuardXorFP(SelectionDAG &DAG,
28979+
SDValue Val, const SDLoc &DL,
28980+
bool FailureBB) const {
28981+
if (FailureBB) {
28982+
return DAG.getNode(
28983+
ISD::XOR, DL, Val.getValueType(), Val,
28984+
DAG.getCopyFromReg(DAG.getEntryNode(), DL,
28985+
getStackPointerRegisterToSaveRestore(), MVT::i64));
28986+
}
28987+
return Val;
28988+
}
28989+
2897128990
unsigned AArch64TargetLowering::combineRepeatedFPDivisors() const {
2897228991
// Combine multiple FDIVs with the same divisor into multiple FMULs by the
2897328992
// reciprocal if there are three or more FDIVs.

llvm/lib/Target/AArch64/AArch64ISelLowering.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -359,6 +359,9 @@ class AArch64TargetLowering : public TargetLowering {
359359
shouldExpandAtomicCmpXchgInIR(AtomicCmpXchgInst *AI) const override;
360360

361361
bool useLoadStackGuardNode(const Module &M) const override;
362+
bool useStackGuardXorFP() const override;
363+
SDValue emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val, const SDLoc &DL,
364+
bool FailureBB) const override;
362365
TargetLoweringBase::LegalizeTypeAction
363366
getPreferredVectorAction(MVT VT) const override;
364367

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2739,7 +2739,8 @@ bool X86TargetLowering::useStackGuardXorFP() const {
27392739
}
27402740

27412741
SDValue X86TargetLowering::emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val,
2742-
const SDLoc &DL) const {
2742+
const SDLoc &DL,
2743+
bool FailureBB) const {
27432744
EVT PtrTy = getPointerTy(DAG.getDataLayout());
27442745
unsigned XorOp = Subtarget.is64Bit() ? X86::XOR64_FP : X86::XOR32_FP;
27452746
MachineSDNode *Node = DAG.getMachineNode(XorOp, DL, PtrTy, Val);

llvm/lib/Target/X86/X86ISelLowering.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1594,9 +1594,8 @@ namespace llvm {
15941594
bool useStackGuardXorFP() const override;
15951595
void insertSSPDeclarations(Module &M) const override;
15961596
Function *getSSPStackGuardCheck(const Module &M) const override;
1597-
SDValue emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val,
1598-
const SDLoc &DL) const override;
1599-
1597+
SDValue emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val, const SDLoc &DL,
1598+
bool FailureBB) const override;
16001599

16011600
/// Return true if the target stores SafeStack pointer at a fixed offset in
16021601
/// some non-standard address space, and populates the address space and

llvm/test/CodeGen/AArch64/stack-protector-target.ll

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -34,13 +34,17 @@ declare void @_Z7CapturePi(ptr)
3434
; WINDOWS-AARCH64: eor x8, x8, sp
3535
; WINDOWS-AARCH64: str x8, [sp, #8]
3636
; WINDOWS-AARCH64: bl _Z7CapturePi
37-
; WINDOWS-AARCH64: ldr x0, [sp, #8]
37+
; WINDOWS-AARCH64: ldr x8, [sp, #8]
38+
; WINDOWS-AARCH64: mov x9, sp
39+
; WINDOWS-AARCH64: eor x0, x8, x9
3840
; WINDOWS-AARCH64: bl __security_check_cookie
3941

4042
; WINDOWS-ARM64EC: adrp x8, __security_cookie
4143
; WINDOWS-ARM64EC: ldr x8, [x8, :lo12:__security_cookie]
4244
; WINDOWS-ARM64EC: eor x8, x8, sp
4345
; WINDOWS-ARM64EC: str x8, [sp, #8]
4446
; WINDOWS-ARM64EC: bl "#_Z7CapturePi"
45-
; WINDOWS-ARM64EC: ldr x0, [sp, #8]
47+
; WINDOWS-ARM64EC: ldr x8, [sp, #8]
48+
; WINDOWS-ARM64EC: mov x9, sp
49+
; WINDOWS-ARM64EC: eor x0, x8, x9
4650
; WINDOWS-ARM64EC: bl "#__security_check_cookie_arm64ec"

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