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Bundling ends either on non-meta-instruction or on SCHED_BARRIER
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-9
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llvm/lib/Target/AMDGPU/SIPostRABundler.cpp

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -152,12 +152,7 @@ bool SIPostRABundler::run(MachineFunction &MF) {
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for (MachineBasicBlock &MBB : MF) {
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bool HasIGLPInstrs = llvm::any_of(MBB.instrs(), [](MachineInstr &MI) {
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unsigned Opc = MI.getOpcode();
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// Bypass a MBB with SCHED_BARRIER as well to make it honored.
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// If SCHED_BARRIER is embedded between memory operations in a bundle,
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// that SCHED_BARRIER is not picked up by IGLPmutation in post mi
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// scheduler phase.
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return Opc == AMDGPU::SCHED_GROUP_BARRIER || Opc == AMDGPU::IGLP_OPT ||
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Opc == AMDGPU::SCHED_BARRIER;
155+
return Opc == AMDGPU::SCHED_GROUP_BARRIER || Opc == AMDGPU::IGLP_OPT;
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});
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// Don't cluster with IGLP instructions.
@@ -190,9 +185,11 @@ bool SIPostRABundler::run(MachineFunction &MF) {
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if (I->getNumExplicitDefs() != 0)
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Defs.insert(I->defs().begin()->getReg());
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++ClauseLength;
193-
} else if (!I->isMetaInstruction()) {
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// Allow meta instructions in between bundle candidates, but do not
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// start or end a bundle on one.
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} else if (!I->isMetaInstruction() ||
189+
I->getOpcode() == AMDGPU::SCHED_BARRIER) {
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// SCHED_BARRIER is not bundled to be honored by scheduler later.
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// Allow other meta instructions in between bundle candidates, but do
192+
// not start or end a bundle on one.
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//
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// TODO: It may be better to move meta instructions like dbg_value
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// after the bundle. We're relying on the memory legalizer to unbundle

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