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[SelectionDAG] Fix return types of TC_RETURN for several targets (#116504)
TC_RETURN nodes do not have a glue result.
1 parent 24c7d97 commit baf59be

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7 files changed

+15
-23
lines changed

7 files changed

+15
-23
lines changed

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9353,13 +9353,11 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
93539353
if (InGlue.getNode())
93549354
Ops.push_back(InGlue);
93559355

9356-
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
9357-
93589356
// If we're doing a tall call, use a TC_RETURN here rather than an
93599357
// actual call instruction.
93609358
if (IsTailCall) {
93619359
MF.getFrameInfo().setHasTailCall();
9362-
SDValue Ret = DAG.getNode(Opc, DL, NodeTys, Ops);
9360+
SDValue Ret = DAG.getNode(Opc, DL, MVT::Other, Ops);
93639361
if (IsCFICall)
93649362
Ret.getNode()->setCFIType(CLI.CFIType->getZExtValue());
93659363

@@ -9369,7 +9367,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
93699367
}
93709368

93719369
// Returns a chain and a flag for retval copy to use.
9372-
Chain = DAG.getNode(Opc, DL, NodeTys, Ops);
9370+
Chain = DAG.getNode(Opc, DL, {MVT::Other, MVT::Glue}, Ops);
93739371
if (IsCFICall)
93749372
Chain.getNode()->setCFIType(CLI.CFIType->getZExtValue());
93759373

‎llvm/lib/Target/AMDGPU/SIISelLowering.cpp‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3942,8 +3942,6 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
39423942
if (InGlue)
39433943
Ops.push_back(InGlue);
39443944

3945-
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
3946-
39473945
// If we're doing a tall call, use a TC_RETURN here rather than an
39483946
// actual call instruction.
39493947
if (IsTailCall) {
@@ -3959,11 +3957,11 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
39593957
break;
39603958
}
39613959

3962-
return DAG.getNode(OPC, DL, NodeTys, Ops);
3960+
return DAG.getNode(OPC, DL, MVT::Other, Ops);
39633961
}
39643962

39653963
// Returns a chain and a flag for retval copy to use.
3966-
SDValue Call = DAG.getNode(AMDGPUISD::CALL, DL, NodeTys, Ops);
3964+
SDValue Call = DAG.getNode(AMDGPUISD::CALL, DL, {MVT::Other, MVT::Glue}, Ops);
39673965
Chain = Call.getValue(0);
39683966
InGlue = Call.getValue(1);
39693967

‎llvm/lib/Target/ARM/ARMISelLowering.cpp‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3002,17 +3002,16 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
30023002
if (InGlue.getNode())
30033003
Ops.push_back(InGlue);
30043004

3005-
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
30063005
if (isTailCall) {
30073006
MF.getFrameInfo().setHasTailCall();
3008-
SDValue Ret = DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops);
3007+
SDValue Ret = DAG.getNode(ARMISD::TC_RETURN, dl, MVT::Other, Ops);
30093008
DAG.addNoMergeSiteInfo(Ret.getNode(), CLI.NoMerge);
30103009
DAG.addCallSiteInfo(Ret.getNode(), std::move(CSInfo));
30113010
return Ret;
30123011
}
30133012

30143013
// Returns a chain and a flag for retval copy to use.
3015-
Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops);
3014+
Chain = DAG.getNode(CallOpc, dl, {MVT::Other, MVT::Glue}, Ops);
30163015
DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge);
30173016
InGlue = Chain.getValue(1);
30183017
DAG.addCallSiteInfo(Chain.getNode(), std::move(CSInfo));

‎llvm/lib/Target/Hexagon/HexagonISelLowering.cpp‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -580,7 +580,6 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
580580
}
581581

582582
// Returns a chain & a flag for retval copy to use.
583-
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
584583
SmallVector<SDValue, 8> Ops;
585584
Ops.push_back(Chain);
586585
Ops.push_back(Callee);
@@ -599,7 +598,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
599598

600599
if (CLI.IsTailCall) {
601600
MFI.setHasTailCall();
602-
return DAG.getNode(HexagonISD::TC_RETURN, dl, NodeTys, Ops);
601+
return DAG.getNode(HexagonISD::TC_RETURN, dl, MVT::Other, Ops);
603602
}
604603

605604
// Set this here because we need to know this for "hasFP" in frame lowering.
@@ -608,7 +607,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
608607
MFI.setHasCalls(true);
609608

610609
unsigned OpCode = DoesNotReturn ? HexagonISD::CALLnr : HexagonISD::CALL;
611-
Chain = DAG.getNode(OpCode, dl, NodeTys, Ops);
610+
Chain = DAG.getNode(OpCode, dl, {MVT::Other, MVT::Glue}, Ops);
612611
Glue = Chain.getValue(1);
613612

614613
// Create the CALLSEQ_END node.

‎llvm/lib/Target/M68k/M68kISelLowering.cpp‎

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -810,8 +810,6 @@ SDValue M68kTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
810810
S->getSymbol(), getPointerTy(DAG.getDataLayout()), OpFlags);
811811
}
812812

813-
// Returns a chain & a flag for retval copy to use.
814-
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
815813
SmallVector<SDValue, 8> Ops;
816814

817815
if (!IsSibcall && IsTailCall) {
@@ -842,10 +840,11 @@ SDValue M68kTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
842840

843841
if (IsTailCall) {
844842
MF.getFrameInfo().setHasTailCall();
845-
return DAG.getNode(M68kISD::TC_RETURN, DL, NodeTys, Ops);
843+
return DAG.getNode(M68kISD::TC_RETURN, DL, MVT::Other, Ops);
846844
}
847845

848-
Chain = DAG.getNode(M68kISD::CALL, DL, NodeTys, Ops);
846+
// Returns a chain & a flag for retval copy to use.
847+
Chain = DAG.getNode(M68kISD::CALL, DL, {MVT::Other, MVT::Glue}, Ops);
849848
InGlue = Chain.getValue(1);
850849

851850
// Create the CALLSEQ_END node.

‎llvm/lib/Target/Sparc/SparcInstrInfo.td‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -312,8 +312,7 @@ def call : SDNode<"SPISD::CALL", SDT_SPCall,
312312
SDNPVariadic]>;
313313

314314
def tailcall : SDNode<"SPISD::TAIL_CALL", SDT_SPCall,
315-
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue,
316-
SDNPVariadic]>;
315+
[SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
317316

318317
def SDT_SPRet : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
319318
def retglue : SDNode<"SPISD::RET_GLUE", SDT_SPRet,

‎llvm/lib/Target/X86/X86ISelLoweringCall.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2417,8 +2417,6 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
24172417
Callee = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i64, Callee);
24182418
}
24192419

2420-
// Returns a chain & a glue for retval copy to use.
2421-
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
24222420
SmallVector<SDValue, 8> Ops;
24232421

24242422
if (!IsSibcall && isTailCall && !IsMustTail) {
@@ -2523,7 +2521,7 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
25232521
// should be computed from returns not tail calls. Consider a void
25242522
// function making a tail call to a function returning int.
25252523
MF.getFrameInfo().setHasTailCall();
2526-
SDValue Ret = DAG.getNode(X86ISD::TC_RETURN, dl, NodeTys, Ops);
2524+
SDValue Ret = DAG.getNode(X86ISD::TC_RETURN, dl, MVT::Other, Ops);
25272525

25282526
if (IsCFICall)
25292527
Ret.getNode()->setCFIType(CLI.CFIType->getZExtValue());
@@ -2533,6 +2531,8 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
25332531
return Ret;
25342532
}
25352533

2534+
// Returns a chain & a glue for retval copy to use.
2535+
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
25362536
if (HasNoCfCheck && IsCFProtectionSupported && IsIndirectCall) {
25372537
Chain = DAG.getNode(X86ISD::NT_CALL, dl, NodeTys, Ops);
25382538
} else if (CLI.CB && objcarc::hasAttachedCallOpBundle(CLI.CB)) {

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