further name

Author: shiltian

llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

@@ -788,7 +788,8 @@ isPKF32InstrReplicatingLow32BitsOfScalarInput(const GCNSubtarget *ST,
 // Packed FP32 instructions only read 32 bits from a scalar operand (SGPR or
 // literal) and replicates the bits to both channels. Therefore, if the hi and
 // lo are not same, we can't fold it.
-static bool checkImmOpForPKF32Instr(const FoldableDef &OpToFold) {
+static bool checkImmOpForPKF32InstrReplicatingLow32BitsOfScalarInput(
+    const FoldableDef &OpToFold) {
   assert(OpToFold.isImm() && "Expected immediate operand");
   uint64_t ImmVal = OpToFold.getEffectiveImmVal().value();
   uint32_t Lo = Lo_32(ImmVal);
@@ -953,7 +954,7 @@ bool SIFoldOperandsImpl::tryAddToFoldList(
   // src0 or src1.
   if (OpToFold.isImm() &&
       isPKF32InstrReplicatingLow32BitsOfScalarInput(ST, MI) &&
-      !checkImmOpForPKF32Instr(OpToFold))
+      !checkImmOpForPKF32InstrReplicatingLow32BitsOfScalarInput(OpToFold))
     return false;
 
   appendFoldCandidate(FoldList, MI, OpNo, OpToFold);
@@ -1172,7 +1173,7 @@ bool SIFoldOperandsImpl::tryToFoldACImm(
 
   if (OpToFold.isImm() && OpToFold.isOperandLegal(*TII, *UseMI, UseOpIdx)) {
     if (isPKF32InstrReplicatingLow32BitsOfScalarInput(ST, UseMI) &&
-        !checkImmOpForPKF32Instr(OpToFold))
+        !checkImmOpForPKF32InstrReplicatingLow32BitsOfScalarInput(OpToFold))
       return false;
     appendFoldCandidate(FoldList, UseMI, UseOpIdx, OpToFold);
     return true;