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[LAA] Move scalable vector check into getStrideFromAddRec() (#154013)
This moves the check closer to the `.getFixedValue()` call and fixes #153797 (which is a regression from #126971).
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2 files changed

+32
-5
lines changed

2 files changed

+32
-5
lines changed

llvm/lib/Analysis/LoopAccessAnalysis.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -936,6 +936,12 @@ class AccessAnalysis {
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static std::optional<int64_t>
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getStrideFromAddRec(const SCEVAddRecExpr *AR, const Loop *Lp, Type *AccessTy,
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Value *Ptr, PredicatedScalarEvolution &PSE) {
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if (isa<ScalableVectorType>(AccessTy)) {
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LLVM_DEBUG(dbgs() << "LAA: Bad stride - Scalable object: " << *AccessTy
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<< "\n");
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return std::nullopt;
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}
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// The access function must stride over the innermost loop.
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if (Lp != AR->getLoop()) {
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LLVM_DEBUG({
@@ -1590,11 +1596,6 @@ llvm::getPtrStride(PredicatedScalarEvolution &PSE, Type *AccessTy, Value *Ptr,
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return 0;
15911597

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assert(Ptr->getType()->isPointerTy() && "Unexpected non-ptr");
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if (isa<ScalableVectorType>(AccessTy)) {
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LLVM_DEBUG(dbgs() << "LAA: Bad stride - Scalable object: " << *AccessTy
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<< "\n");
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return std::nullopt;
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}
15981599

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const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(PtrScev);
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if (Assume && !AR)

llvm/test/Analysis/LoopAccessAnalysis/scalable-vector-regression-tests.ll

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -61,3 +61,29 @@ vector.body:
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end:
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ret void
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}
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; CHECK-LABEL: 'regression_test_is_no_wrap_access_scalable_typesize'
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; CHECK: LAA: Found an analyzable loop: loop
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; CHECK: LAA: Bad stride - Scalable object: <vscale x 4 x i32>
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define void @regression_test_is_no_wrap_access_scalable_typesize(ptr %ptr_a, i64 %n, ptr %ptr_b) {
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%2 = shl i64 %iv, 1
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%3 = add i64 %2, %n
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%4 = trunc i64 %iv to i32
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%5 = insertelement <vscale x 4 x i32> zeroinitializer, i32 %4, i64 0
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%6 = getelementptr i32, ptr %ptr_a, i64 %3
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store <vscale x 4 x i32> %5, ptr %6, align 4
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%.reass3 = or i32 %4, 1
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%7 = insertelement <vscale x 4 x i32> zeroinitializer, i32 %.reass3, i64 0
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%8 = shufflevector <vscale x 4 x i32> %7, <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
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%9 = getelementptr i32, ptr %ptr_b, i64 %3
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store <vscale x 4 x i32> %8, ptr %9, align 4
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%iv.next = add i64 %iv, 1
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%.not = icmp eq i64 %iv, 16
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br i1 %.not, label %end, label %loop
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end:
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ret void
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}

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