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1 parent 5b9ac13 commit bb6165bCopy full SHA for bb6165b
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -815,7 +815,7 @@ void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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if (Fix16BitCopies) {
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if (((Size == 16) != (SrcSize == 16))) {
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// Non-VGPR Src and Dst will later be expanded back to 32 bits.
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- assert(ST.useRealTrue16BitInsts());
+ assert(ST.useRealTrue16Insts());
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MCRegister &RegToFix = (Size == 32) ? DestReg : SrcReg;
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MCRegister SubReg = RI.getSubReg(RegToFix, AMDGPU::lo16);
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RegToFix = SubReg;
@@ -989,7 +989,7 @@ void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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return;
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}
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- if (ST.useRealTrue16BitInsts()) {
+ if (ST.useRealTrue16Insts()) {
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if (IsSGPRSrc) {
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assert(SrcLow);
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SrcReg = NewSrcReg;
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