Address review comments

Author: huntergr-arm

llvm/docs/LangRef.rst

@@ -20002,18 +20002,15 @@ the follow sequence of operations:
 
 The ``mask`` operand will apply to at least the gather and scatter operations.
 
-'``llvm.experimental.vector.masked.extract.last.active``' Intrinsic
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+'``llvm.experimental.vector.extract.last.active``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 This is an overloaded intrinsic.
 
-This intrinsic will extract the value from a single lane of a vector, based
-on a supplied mask vector.
-
 ::
 
-    declare i32 @llvm.experimental.vector.masked.extract.last.active.v4i32(<4 x i32> %data, <4 x i1> %mask, i32 %passthru)
-    declare i16 @llvm.experimental.vector.masked.extract.last.active.nxv8i16(<vscale x 8 x i16> %data, <vscale x 8 x i1> %mask, i16 %passthru)
+    declare i32 @llvm.experimental.vector.extract.last.active.v4i32(<4 x i32> %data, <4 x i1> %mask, i32 %passthru)
+    declare i16 @llvm.experimental.vector.extract.last.active.nxv8i16(<vscale x 8 x i16> %data, <vscale x 8 x i1> %mask, i16 %passthru)
 
 Arguments:
 """"""""""
@@ -20028,10 +20025,10 @@ the passthru value must match that of the elements of the data vector.
 Semantics:
 """"""""""
 
-The '``llvm.experimental.vector.masked.extract.last.active``' intrinsic will
-find the index of the most significant active lane in the mask vector, and
-extract the element at that index in the corresponding data vector. If no mask
-lanes are active then the passthru value is returned instead.
+The '``llvm.experimental.vector.extract.last.active``' intrinsic will extract an
+element from the data vector at the index matching the highest active lane of
+the mask vector. If no mask lanes are active then the passthru value is
+returned instead.
 
 .. _int_vector_compress:
 

llvm/include/llvm/IR/Intrinsics.td

@@ -1921,7 +1921,7 @@ def int_experimental_vector_histogram_add : DefaultAttrsIntrinsic<[],
                              [ IntrArgMemOnly ]>;
 
 // Extract based on mask bits
-def int_experimental_vector_masked_extract_last_active:
+def int_experimental_vector_extract_last_active:
     DefaultAttrsIntrinsic<[LLVMVectorElementType<0>],
               [llvm_anyvector_ty, LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
                LLVMVectorElementType<0>], [IntrNoMem]>;

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

@@ -8207,24 +8207,40 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
     visitVectorHistogram(I, Intrinsic);
     return;
   }
-  case Intrinsic::experimental_vector_masked_extract_last_active: {
+  case Intrinsic::experimental_vector_extract_last_active: {
     SDValue Data = getValue(I.getOperand(0));
     SDValue Mask = getValue(I.getOperand(1));
     SDValue PassThru = getValue(I.getOperand(2));
 
     EVT DataVT = Data.getValueType();
     EVT ScalarVT = PassThru.getValueType();
     EVT BoolVT = Mask.getValueType().getScalarType();
-    EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
-    EVT IdxVecVT = DataVT.changeVectorElementType(IdxVT);
 
-    SDValue Zeroes = DAG.getConstant(0, sdl, IdxVecVT);
-    SDValue StepVec = DAG.getStepVector(sdl, IdxVecVT);
-    SDValue ActiveElts = DAG.getSelect(sdl, IdxVecVT, Mask, StepVec, Zeroes);
+    // Find a suitable type for a stepvector.
+    ConstantRange VScaleRange(1, /*isFullSet=*/true); // Dummy value.
+    if (DataVT.isScalableVector())
+      VScaleRange = getVScaleRange(I.getCaller(), 64);
+    unsigned EltWidth = TLI.getBitWidthForCttzElements(
+        I.getType(), DataVT.getVectorElementCount(), /*ZeroIsPoison=*/true,
+        &VScaleRange);
+    MVT StepVT = MVT::getIntegerVT(EltWidth);
+    EVT StepVecVT = DataVT.changeVectorElementType(StepVT);
+
+    // Zero out lanes with inactive elements, then find the highest remaining
+    // value from the stepvector.
+    SDValue Zeroes = DAG.getConstant(0, sdl, StepVecVT);
+    SDValue StepVec = DAG.getStepVector(sdl, StepVecVT);
+    SDValue ActiveElts = DAG.getSelect(sdl, StepVecVT, Mask, StepVec, Zeroes);
     SDValue HighestIdx =
-        DAG.getNode(ISD::VECREDUCE_UMAX, sdl, IdxVT, ActiveElts);
+        DAG.getNode(ISD::VECREDUCE_UMAX, sdl, StepVT, ActiveElts);
+
+    // Extract the corresponding lane from the data vector
+    EVT ExtVT = TLI.getVectorIdxTy(DAG.getDataLayout());
+    SDValue Idx = DAG.getZExtOrTrunc(HighestIdx, sdl, ExtVT);
     SDValue Extract =
-        DAG.getNode(ISD::EXTRACT_VECTOR_ELT, sdl, ScalarVT, Data, HighestIdx);
+        DAG.getNode(ISD::EXTRACT_VECTOR_ELT, sdl, ScalarVT, Data, Idx);
+
+    // If all mask lanes were inactive, choose the passthru value instead.
     SDValue AnyActive = DAG.getNode(ISD::VECREDUCE_OR, sdl, BoolVT, Mask);
     SDValue Result = DAG.getSelect(sdl, ScalarVT, AnyActive, Extract, PassThru);
     setValue(&I, Result);

llvm/lib/IR/AutoUpgrade.cpp

@@ -1119,6 +1119,9 @@ static bool upgradeIntrinsicFunction1(Function *F, Function *&NewFn,
     if (Name.consume_front("experimental.vector.")) {
       Intrinsic::ID ID =
           StringSwitch<Intrinsic::ID>(Name)
+              // Skip over extract.last.active, otherwise it will be 'upgraded'
+              // to a regular vector extract which is a different operation.
+              .StartsWith("extract.last.active.", Intrinsic::not_intrinsic)
               .StartsWith("extract.", Intrinsic::vector_extract)
               .StartsWith("insert.", Intrinsic::vector_insert)
               .StartsWith("splice.", Intrinsic::vector_splice)