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‎llvm/test/CodeGen/RISCV/remat.ll‎

Lines changed: 175 additions & 1 deletion
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@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O1 -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -O1 -mtriple=riscv64 -mattr=+d,+zfh,+zfbfmin -verify-machineinstrs < %s | FileCheck %s
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@a = common global i32 0, align 4
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@l = common global i32 0, align 4
@@ -200,3 +200,177 @@ for.end: ; preds = %for.inc, %entry
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}
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declare i32 @foo(i32, i32, i32, i32, i32, i32)
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define void @remat_load(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, double %8, double %9, double %10, double %11, double %12, double %13, double %14, double %15, i8 %stackarg0, i16 %stackarg1, i32 %stackarg2, i64 %stackarg3, half %stackarg4, bfloat %stackarg5, float %stackarg6, double %stackarg7, ptr %p) nounwind {
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; CHECK-LABEL: remat_load:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addi sp, sp, -256
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; CHECK-NEXT: sd ra, 248(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s0, 240(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s1, 232(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s2, 224(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s3, 216(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s4, 208(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s5, 200(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s6, 192(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s7, 184(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s8, 176(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s9, 168(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s10, 160(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s11, 152(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs0, 144(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs1, 136(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs2, 128(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs3, 120(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs4, 112(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs5, 104(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs6, 96(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs7, 88(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs8, 80(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs9, 72(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs10, 64(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fsd fs11, 56(sp) # 8-byte Folded Spill
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; CHECK-NEXT: fld fa5, 312(sp)
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; CHECK-NEXT: fsd fa5, 48(sp) # 8-byte Folded Spill
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; CHECK-NEXT: flw fa4, 304(sp)
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; CHECK-NEXT: fsw fa4, 44(sp) # 4-byte Folded Spill
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; CHECK-NEXT: flh fa3, 296(sp)
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; CHECK-NEXT: fsh fa3, 42(sp) # 2-byte Folded Spill
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; CHECK-NEXT: flh fa2, 288(sp)
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; CHECK-NEXT: fsh fa2, 40(sp) # 2-byte Folded Spill
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; CHECK-NEXT: ld a0, 320(sp)
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; CHECK-NEXT: sd a0, 0(sp) # 8-byte Folded Spill
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; CHECK-NEXT: lbu a4, 256(sp)
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; CHECK-NEXT: sd a4, 8(sp) # 8-byte Folded Spill
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; CHECK-NEXT: lh a3, 264(sp)
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; CHECK-NEXT: sd a3, 16(sp) # 8-byte Folded Spill
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; CHECK-NEXT: lw a2, 272(sp)
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; CHECK-NEXT: sd a2, 24(sp) # 8-byte Folded Spill
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; CHECK-NEXT: ld a1, 280(sp)
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; CHECK-NEXT: sd a1, 32(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sb a4, 0(a0)
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; CHECK-NEXT: sh a3, 0(a0)
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; CHECK-NEXT: sw a2, 0(a0)
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; CHECK-NEXT: sd a1, 0(a0)
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; CHECK-NEXT: fsh fa2, 0(a0)
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; CHECK-NEXT: fsh fa3, 0(a0)
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; CHECK-NEXT: fsw fa4, 0(a0)
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; CHECK-NEXT: fsd fa5, 0(a0)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: ld a0, 0(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld a1, 8(sp) # 8-byte Folded Reload
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; CHECK-NEXT: sb a1, 0(a0)
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; CHECK-NEXT: ld a1, 16(sp) # 8-byte Folded Reload
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; CHECK-NEXT: sh a1, 0(a0)
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; CHECK-NEXT: ld a1, 24(sp) # 8-byte Folded Reload
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; CHECK-NEXT: sw a1, 0(a0)
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; CHECK-NEXT: ld a1, 32(sp) # 8-byte Folded Reload
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; CHECK-NEXT: sd a1, 0(a0)
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; CHECK-NEXT: flh fa5, 40(sp) # 2-byte Folded Reload
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; CHECK-NEXT: fsh fa5, 0(a0)
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; CHECK-NEXT: flh fa5, 42(sp) # 2-byte Folded Reload
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; CHECK-NEXT: fsh fa5, 0(a0)
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; CHECK-NEXT: flw fa5, 44(sp) # 4-byte Folded Reload
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; CHECK-NEXT: fsw fa5, 0(a0)
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; CHECK-NEXT: fld fa5, 48(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fsd fa5, 0(a0)
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; CHECK-NEXT: ld ra, 248(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s1, 232(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s2, 224(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s3, 216(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s4, 208(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s5, 200(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s6, 192(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s7, 184(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s8, 176(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s9, 168(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s10, 160(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s11, 152(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs0, 144(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs1, 136(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs2, 128(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs3, 120(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs4, 112(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs5, 104(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs6, 96(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs7, 88(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs8, 80(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs9, 72(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs10, 64(sp) # 8-byte Folded Reload
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; CHECK-NEXT: fld fs11, 56(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 256
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; CHECK-NEXT: ret
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entry:
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; Force loading the stack arguments to create their live interval
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store volatile i8 %stackarg0, ptr %p
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store volatile i16 %stackarg1, ptr %p
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store volatile i32 %stackarg2, ptr %p
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store volatile i64 %stackarg3, ptr %p
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store volatile half %stackarg4, ptr %p
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store volatile bfloat %stackarg5, ptr %p
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store volatile float %stackarg6, ptr %p
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store volatile double %stackarg7, ptr %p
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tail call void asm sideeffect "", "~{x1},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x16},~{x17},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{x29},~{x30},~{x31},~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
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; Now use them after spilling everything to force rematerialization
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store volatile i8 %stackarg0, ptr %p
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store volatile i16 %stackarg1, ptr %p
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store volatile i32 %stackarg2, ptr %p
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store volatile i64 %stackarg3, ptr %p
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store volatile half %stackarg4, ptr %p
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store volatile bfloat %stackarg5, ptr %p
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store volatile float %stackarg6, ptr %p
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store volatile double %stackarg7, ptr %p
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ret void
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}
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; We could remat the load of the constant global if we extended the live
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; interval of the high bits of the address.
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@const = constant i32 42
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define i32 @constglobal_load() nounwind {
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; CHECK-LABEL: constglobal_load:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addi sp, sp, -112
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; CHECK-NEXT: sd ra, 104(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s0, 96(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s1, 88(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s2, 80(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s3, 72(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s4, 64(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s5, 56(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s6, 48(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s7, 40(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s8, 32(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s9, 24(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s10, 16(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s11, 8(sp) # 8-byte Folded Spill
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; CHECK-NEXT: lui a0, %hi(const)
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; CHECK-NEXT: lw a0, %lo(const)(a0)
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; CHECK-NEXT: sd a0, 0(sp) # 8-byte Folded Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: ld a0, 0(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addiw a0, a0, 1
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; CHECK-NEXT: ld ra, 104(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s0, 96(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s1, 88(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s2, 80(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s3, 72(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s4, 64(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s5, 56(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s6, 48(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s7, 40(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s8, 32(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s9, 24(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s10, 16(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s11, 8(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 112
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; CHECK-NEXT: ret
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entry:
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%global = load i32, ptr @const
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tail call void asm sideeffect "", "~{x1},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x16},~{x17},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{x29},~{x30},~{x31}"()
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%a = add i32 %global, 1
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ret i32 %a
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}

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