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mshahneomshahneo
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Address review comments.
Add linebreak for large lines. Rename test directory to 'LevelZero'.
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+30
-25
lines changed

5 files changed

+30
-25
lines changed

‎mlir/test/Integration/GPU/LEVELZERO/gpu-addf32-to-spirv.mlir‎ renamed to ‎mlir/test/Integration/GPU/LevelZero/gpu-addf32-to-spirv.mlir‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -26,9 +26,8 @@ module @add attributes {gpu.container_module} {
2626
memref.copy %arg0, %memref_0 : memref<2x2x2xf32> to memref<2x2x2xf32>
2727
%memref_2 = gpu.alloc host_shared () : memref<2x2x2xf32>
2828
%2 = gpu.wait async
29-
30-
%3 = gpu.launch_func async [%2] @test_kernel::@test_kernel blocks in (%c2, %c2, %c2) threads in (%c1, %c1, %c1) args(%memref_0 : memref<2x2x2xf32>, %mem : memref<2x2x2xf32>, %memref_2 : memref<2x2x2xf32>)
31-
29+
%3 = gpu.launch_func async [%2] @test_kernel::@test_kernel blocks in (%c2, %c2, %c2) threads in (%c1, %c1, %c1)
30+
args(%memref_0 : memref<2x2x2xf32>, %mem : memref<2x2x2xf32>, %memref_2 : memref<2x2x2xf32>)
3231
gpu.wait [%3]
3332
%alloc = memref.alloc() : memref<2x2x2xf32>
3433
memref.copy %memref_2, %alloc : memref<2x2x2xf32> to memref<2x2x2xf32>
@@ -39,8 +38,10 @@ module @add attributes {gpu.container_module} {
3938
gpu.wait [%7]
4039
return %alloc : memref<2x2x2xf32>
4140
}
42-
gpu.module @test_kernel attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
43-
gpu.func @test_kernel(%arg0: memref<2x2x2xf32>, %arg1: memref<2x2x2xf32>, %arg2: memref<2x2x2xf32>) kernel attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 2, 2, 2>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
41+
gpu.module @test_kernel
42+
attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
43+
gpu.func @test_kernel(%arg0: memref<2x2x2xf32>, %arg1: memref<2x2x2xf32>, %arg2: memref<2x2x2xf32>) kernel
44+
attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 2, 2, 2>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
4445
%0 = gpu.block_id x
4546
%1 = gpu.block_id y
4647
%2 = gpu.block_id z

‎mlir/test/Integration/GPU/LEVELZERO/gpu-addi64-to-spirv.mlir‎ renamed to ‎mlir/test/Integration/GPU/LevelZero/gpu-addi64-to-spirv.mlir‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -26,9 +26,8 @@ module @add attributes {gpu.container_module} {
2626
memref.copy %arg0, %memref_0 : memref<3x3xi64> to memref<3x3xi64>
2727
%memref_2 = gpu.alloc host_shared () : memref<3x3xi64>
2828
%2 = gpu.wait async
29-
30-
%3 = gpu.launch_func async [%2] @test_kernel::@test_kernel blocks in (%c3, %c3, %c1) threads in (%c1, %c1, %c1) args(%memref_0 : memref<3x3xi64>, %mem : memref<3x3xi64>, %memref_2 : memref<3x3xi64>)
31-
29+
%3 = gpu.launch_func async [%2] @test_kernel::@test_kernel blocks in (%c3, %c3, %c1) threads in (%c1, %c1, %c1)
30+
args(%memref_0 : memref<3x3xi64>, %mem : memref<3x3xi64>, %memref_2 : memref<3x3xi64>)
3231
gpu.wait [%3]
3332
%alloc = memref.alloc() : memref<3x3xi64>
3433
memref.copy %memref_2, %alloc : memref<3x3xi64> to memref<3x3xi64>
@@ -39,8 +38,10 @@ module @add attributes {gpu.container_module} {
3938
gpu.wait [%7]
4039
return %alloc : memref<3x3xi64>
4140
}
42-
gpu.module @test_kernel attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
43-
gpu.func @test_kernel(%arg0: memref<3x3xi64>, %arg1: memref<3x3xi64>, %arg2: memref<3x3xi64>) kernel attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 3, 3, 1>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
41+
gpu.module @test_kernel
42+
attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
43+
gpu.func @test_kernel(%arg0: memref<3x3xi64>, %arg1: memref<3x3xi64>, %arg2: memref<3x3xi64>) kernel
44+
attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 3, 3, 1>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
4445
%0 = gpu.block_id x
4546
%1 = gpu.block_id y
4647
%2 = memref.load %arg0[%0, %1] : memref<3x3xi64>

‎mlir/test/Integration/GPU/LEVELZERO/gpu-memcpy-addf32-to-spirv.mlir‎ renamed to ‎mlir/test/Integration/GPU/LevelZero/gpu-memcpy-addf32-to-spirv.mlir‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -26,18 +26,19 @@ module @add attributes {gpu.container_module} {
2626
%memref_0 = gpu.alloc () : memref<2x2x2xf32>
2727
gpu.memcpy %memref_0, %arg1 : memref<2x2x2xf32>, memref<2x2x2xf32>
2828
%memref_1 = gpu.alloc () : memref<2x2x2xf32>
29-
30-
gpu.launch_func @test_kernel::@test_kernel blocks in (%c2, %c2, %c2) threads in (%c1, %c1, %c1) args(%memref : memref<2x2x2xf32>, %memref_0 : memref<2x2x2xf32>, %memref_1 : memref<2x2x2xf32>)
31-
29+
gpu.launch_func @test_kernel::@test_kernel blocks in (%c2, %c2, %c2) threads in (%c1, %c1, %c1)
30+
args(%memref : memref<2x2x2xf32>, %memref_0 : memref<2x2x2xf32>, %memref_1 : memref<2x2x2xf32>)
3231
%alloc = memref.alloc() : memref<2x2x2xf32>
3332
gpu.memcpy %alloc, %memref_1 : memref<2x2x2xf32>, memref<2x2x2xf32>
3433
gpu.dealloc %memref_1 : memref<2x2x2xf32>
3534
gpu.dealloc %memref_0 : memref<2x2x2xf32>
3635
gpu.dealloc %memref : memref<2x2x2xf32>
3736
return %alloc : memref<2x2x2xf32>
3837
}
39-
gpu.module @test_kernel attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
40-
gpu.func @test_kernel(%arg0: memref<2x2x2xf32>, %arg1: memref<2x2x2xf32>, %arg2: memref<2x2x2xf32>) kernel attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 2, 2, 2>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
38+
gpu.module @test_kernel
39+
attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
40+
gpu.func @test_kernel(%arg0: memref<2x2x2xf32>, %arg1: memref<2x2x2xf32>, %arg2: memref<2x2x2xf32>) kernel
41+
attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 2, 2, 2>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
4142
%0 = gpu.block_id x
4243
%1 = gpu.block_id y
4344
%2 = gpu.block_id z

‎mlir/test/Integration/GPU/LEVELZERO/gpu-reluf32-to-spirv.mlir‎ renamed to ‎mlir/test/Integration/GPU/LevelZero/gpu-reluf32-to-spirv.mlir‎

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -41,15 +41,13 @@ module @relu attributes {gpu.container_module} {
4141
memref.copy %arg0, %memref : memref<4x5xf32> to memref<4x5xf32>
4242
%memref_0 = gpu.alloc host_shared () : memref<4x5xi1>
4343
%2 = gpu.wait async
44-
45-
%3 = gpu.launch_func async [%2] @test_kernel::@test_kernel blocks in (%c4, %c5, %c1) threads in (%c1, %c1, %c1) args(%memref : memref<4x5xf32>, %cst : f32, %memref_0 : memref<4x5xi1>)
46-
44+
%3 = gpu.launch_func async [%2] @test_kernel::@test_kernel blocks in (%c4, %c5, %c1) threads in (%c1, %c1, %c1)
45+
args(%memref : memref<4x5xf32>, %cst : f32, %memref_0 : memref<4x5xi1>)
4746
gpu.wait [%3]
4847
%memref_1 = gpu.alloc host_shared () : memref<4x5xf32>
4948
%4 = gpu.wait async
50-
51-
%5 = gpu.launch_func async [%4] @test_kernel_0::@test_kernel blocks in (%c4, %c5, %c1) threads in (%c1, %c1, %c1) args(%memref_0 : memref<4x5xi1>, %memref : memref<4x5xf32>, %cst : f32,
52-
49+
%5 = gpu.launch_func async [%4] @test_kernel_0::@test_kernel blocks in (%c4, %c5, %c1) threads in (%c1, %c1, %c1)
50+
args(%memref_0 : memref<4x5xi1>, %memref : memref<4x5xf32>, %cst : f32,
5351
%memref_1 : memref<4x5xf32>)
5452
gpu.wait [%5]
5553
%alloc = memref.alloc() : memref<4x5xf32>
@@ -60,8 +58,10 @@ module @relu attributes {gpu.container_module} {
6058
%9 = gpu.dealloc async [%8] %memref : memref<4x5xf32>
6159
return %alloc : memref<4x5xf32>
6260
}
63-
gpu.module @test_kernel attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Int8, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
64-
gpu.func @test_kernel(%arg0: memref<4x5xf32>, %arg1: f32, %arg2: memref<4x5xi1>) kernel attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 4, 5, 1>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
61+
gpu.module @test_kernel
62+
attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Int8, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
63+
gpu.func @test_kernel(%arg0: memref<4x5xf32>, %arg1: f32, %arg2: memref<4x5xi1>) kernel
64+
attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 4, 5, 1>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
6565
%0 = gpu.block_id x
6666
%1 = gpu.block_id y
6767
%2 = memref.load %arg0[%0, %1] : memref<4x5xf32>
@@ -70,8 +70,10 @@ module @relu attributes {gpu.container_module} {
7070
gpu.return
7171
}
7272
}
73-
gpu.module @test_kernel_0 attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Int8, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
74-
gpu.func @test_kernel(%arg0: memref<4x5xi1>, %arg1: memref<4x5xf32>, %arg2: f32, %arg3: memref<4x5xf32>) kernel attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 4, 5, 1>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
73+
gpu.module @test_kernel_0
74+
attributes {spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Addresses, Int64, Int8, Kernel], []>, api=OpenCL, #spirv.resource_limits<>>} {
75+
gpu.func @test_kernel(%arg0: memref<4x5xi1>, %arg1: memref<4x5xf32>, %arg2: f32, %arg3: memref<4x5xf32>) kernel
76+
attributes {gpu.known_block_size = array<i32: 1, 1, 1>, gpu.known_grid_size = array<i32: 4, 5, 1>, spirv.entry_point_abi = #spirv.entry_point_abi<>} {
7577
%0 = gpu.block_id x
7678
%1 = gpu.block_id y
7779
%2 = memref.load %arg0[%0, %1] : memref<4x5xi1>

‎mlir/test/Integration/GPU/LEVELZERO/lit.local.cfg‎ renamed to ‎mlir/test/Integration/GPU/LevelZero/lit.local.cfg‎

File renamed without changes.

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