1- ; RUN: opt -S -passes=instcombine %s -o - | FileCheck %s
2-
3-
4- declare i64 @llrint (double )
5-
6- ; Positive number test
7- ; CHECK-LABEL: define i64 @test_llrint_pos()
8- ; CHECK-NEXT: entry:
9- ; CHECK-NEXT: ret i64 4
10- define i64 @test_llrint_pos () {
11- entry:
12- %val = call i64 @llrint (double 3 .5 )
13- ret i64 %val
14- }
15-
16- ; Negative number test
17- ; CHECK-LABEL: define i64 @test_llrint_neg()
18- ; CHECK-NEXT: entry:
19- ; CHECK-NEXT: ret i64 -2
20- define i64 @test_llrint_neg () {
21- entry:
22- %val = call i64 @llrint (double -2 .5 )
23- ret i64 %val
24- }
25-
26- ; Zero test
27- ; CHECK-LABEL: define i64 @test_llrint_zero()
28- ; CHECK-NEXT: entry:
29- ; CHECK-NEXT: ret i64 0
30- define i64 @test_llrint_zero () {
31- entry:
32- %val = call i64 @llrint (double 0 .0 )
33- ret i64 %val
34- }
35-
36- ; Large value test
37- ; CHECK-LABEL: define i64 @test_llrint_large()
38- ; CHECK-NEXT: entry:
39- ; CHECK-NEXT: ret i64 1000000
40- define i64 @test_llrint_large () {
41- entry:
42- %val = call i64 @llrint (double 1.0e6 )
43- ret i64 %val
1+ ; RUN: opt -S -passes=instcombine %s | FileCheck %s
2+
3+ ; ============================================================
4+ ; Test constant folding of overloaded @llvm.llrint intrinsic
5+ ; ============================================================
6+
7+ ; LLVM intrinsic declarations (typed overloads)
8+ declare i64 @llvm.llrint.f32 (float )
9+ declare i64 @llvm.llrint.f64 (double )
10+ declare i64 @llvm.llrint.f80 (x86_fp80 )
11+ declare i64 @llvm.llrint.f128 (fp128 )
12+
13+ ; ============================================================
14+ ; float overload
15+ ; ============================================================
16+ define i64 @test_f32_pos () {
17+ ; CHECK-LABEL: @test_f32_pos(
18+ ; CHECK-NEXT: ret i64 4
19+ %v = call i64 @llvm.llrint.f32 (float 3 .5 )
20+ ret i64 %v
4421}
4522
46- ; Rounding test (check ties-to-even)
47- ; CHECK-LABEL: define i64 @test_llrint_round_even()
48- ; CHECK-NEXT: entry:
49- ; CHECK-NEXT: ret i64 2
50- define i64 @test_llrint_round_even () {
51- entry:
52- %val = call i64 @llrint (double 2 .5 )
53- ret i64 %val
23+ define i64 @test_f32_neg () {
24+ ; CHECK-LABEL: @test_f32_neg(
25+ ; CHECK-NEXT: ret i64 -2
26+ %v = call i64 @llvm.llrint.f32 (float -2 .5 )
27+ ret i64 %v
5428}
5529
56- ; NaN test
57- ; CHECK-LABEL: define i64 @test_llrint_nan()
58- ; CHECK-NEXT: entry:
59- ; CHECK-NEXT: %val = call i64 @llrint(double 0x7FF8000000000000)
60- ; CHECK-NEXT: ret i64 %val
61- define i64 @test_llrint_nan () {
62- entry:
63- %val = call i64 @llrint (double 0x7FF8000000000000 ) ; NaN
64- ret i64 %val
30+ ; ============================================================
31+ ; double overload
32+ ; ============================================================
33+ define i64 @test_f64_pos () {
34+ ; CHECK-LABEL: @test_f64_pos(
35+ ; CHECK-NEXT: ret i64 4
36+ %v = call i64 @llvm.llrint.f64 (double 3 .5 )
37+ ret i64 %v
6538}
6639
67- ; +Inf test
68- ; CHECK-LABEL: define i64 @test_llrint_posinf()
69- ; CHECK-NEXT: entry:
70- ; CHECK-NEXT: %val = call i64 @llrint(double 0x7FF0000000000000)
71- ; CHECK-NEXT: ret i64 %val
72- define i64 @test_llrint_posinf () {
73- entry:
74- %val = call i64 @llrint (double 0x7FF0000000000000 ) ; +Inf
75- ret i64 %val
40+ define i64 @test_f64_neg () {
41+ ; CHECK-LABEL: @test_f64_neg(
42+ ; CHECK-NEXT: ret i64 -2
43+ %v = call i64 @llvm.llrint.f64 (double -2 .5 )
44+ ret i64 %v
7645}
7746
78- ; -Inf test
79- ; CHECK-LABEL: define i64 @test_llrint_neginf()
80- ; CHECK-NEXT: entry:
81- ; CHECK-NEXT: %val = call i64 @llrint(double 0xFFF0000000000000)
82- ; CHECK-NEXT: ret i64 %val
83- define i64 @test_llrint_neginf () {
84- entry:
85- %val = call i64 @llrint (double 0xFFF0000000000000 ) ; -Inf
86- ret i64 %val
87- }
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