@@ -203,10 +203,10 @@ constexpr FeatureBitset FeaturesTigerlake =
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FeatureCLWB | FeatureMOVDIRI | FeatureSHSTK | FeatureKL | FeatureWIDEKL;
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constexpr FeatureBitset FeaturesSapphireRapids =
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FeaturesICLServer | FeatureAMX_BF16 | FeatureAMX_INT8 | FeatureAMX_TILE |
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- FeatureAVX512BF16 | FeatureAVX512FP16 | FeatureAVX512VP2INTERSECT |
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- FeatureAVXVNNI | FeatureCLDEMOTE | FeatureENQCMD | FeatureMOVDIR64B |
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- FeatureMOVDIRI | FeaturePTWRITE | FeatureSERIALIZE | FeatureSHSTK |
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- FeatureTSXLDTRK | FeatureUINTR | FeatureWAITPKG;
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+ FeatureAVX512BF16 | FeatureAVX512FP16 | FeatureAVXVNNI | FeatureCLDEMOTE |
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+ FeatureENQCMD | FeatureMOVDIR64B | FeatureMOVDIRI | FeaturePTWRITE |
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+ FeatureSERIALIZE | FeatureSHSTK | FeatureTSXLDTRK | FeatureUINTR |
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+ FeatureWAITPKG;
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// Intel Atom processors.
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// Bonnell has feature parity with Core2 and adds MOVBE.
@@ -367,7 +367,7 @@ constexpr ProcInfo Processors[] = {
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// Tigerlake microarchitecture based processors.
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{ {" tigerlake" }, CK_Tigerlake, FEATURE_AVX512VP2INTERSECT, FeaturesTigerlake },
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// Sapphire Rapids microarchitecture based processors.
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- { {" sapphirerapids" }, CK_SapphireRapids, FEATURE_AVX512VP2INTERSECT , FeaturesSapphireRapids },
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+ { {" sapphirerapids" }, CK_SapphireRapids, FEATURE_AVX512BF16 , FeaturesSapphireRapids },
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// Alderlake microarchitecture based processors.
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{ {" alderlake" }, CK_Alderlake, FEATURE_AVX2, FeaturesAlderlake },
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// Knights Landing processor.
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