@@ -4928,22 +4928,23 @@ SDValue AMDGPUTargetLowering::performSelectCombine(SDNode *N,
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SrcModTrue ? SrcModTrue.getValueType () : SrcModFalse.getValueType ();
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SDValue FLHS =
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SrcModTrue ? SrcModTrue : DAG.getNode (ISD::BITCAST, SL, FVT, LHS);
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- SDValue FRHS = SrcModFalse ? SrcModFalse
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- : DAG.getNode (ISD::BITCAST, SL, FVT, RHS);
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+ SDValue FRHS =
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+ SrcModFalse ? SrcModFalse : DAG.getNode (ISD::BITCAST, SL, FVT, RHS);
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SDValue FSelect = DAG.getNode (ISD::SELECT, SL, FVT, Cond, FLHS, FRHS);
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return DAG.getNode (ISD::BITCAST, SL, VT, FSelect);
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- }
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- return SDValue ();
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- };
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+ }
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+ return SDValue ();
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+ };
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// Support source modifiers on integer operands.
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if (VT == MVT::i32 || VT == MVT::v2i32)
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if (SDValue F = FoldSrcMods (True, False, VT))
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return F;
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- // For i64 if a source modifier is to be folded in we split into two i32
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- // select of high and low values. The Operator need only be applied to the
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- // high values in order to change the sign bit.
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+ // auto SplitSelect = [&]() -> std::pair(
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+ // For i64 if a source modifier is to be folded in we split into two i32
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+ // select of high and low values. The Operator need only be applied to the
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+ // high values in order to change the sign bit.
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if (VT == MVT::i64 ) {
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bool TrueHasModifierOp =
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(True.getOpcode () == ISD::AND || True.getOpcode () == ISD::OR ||
@@ -5024,7 +5025,7 @@ SDValue AMDGPUTargetLowering::performSelectCombine(SDNode *N,
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return Res;
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}
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}
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- }
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+ }
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// There's no reason to not do this if the condition has other uses.
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return performCtlz_CttzCombine (SDLoc (N), Cond, True, False, DCI);
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