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Commit bdd6628

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Mikhail Gudim
committed
[RISCV] Add an option to enable CFIInstrInserter.
1 parent 7287816 commit bdd6628

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3 files changed

+21
-1
lines changed

3 files changed

+21
-1
lines changed

llvm/lib/Target/RISCV/RISCVFrameLowering.cpp

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2507,3 +2507,12 @@ void RISCVFrameLowering::inlineStackProbe(MachineFunction &MF,
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}
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}
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}
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int RISCVFrameLowering::getInitialCFAOffset(const MachineFunction &MF) const {
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return 0;
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}
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Register
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RISCVFrameLowering::getInitialCFARegister(const MachineFunction &MF) const {
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return RISCV::X2;
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}

llvm/lib/Target/RISCV/RISCVFrameLowering.h

Lines changed: 3 additions & 0 deletions
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@@ -23,6 +23,9 @@ class RISCVFrameLowering : public TargetFrameLowering {
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public:
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explicit RISCVFrameLowering(const RISCVSubtarget &STI);
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int getInitialCFAOffset(const MachineFunction &MF) const override;
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Register getInitialCFARegister(const MachineFunction &MF) const override;
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void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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llvm/lib/Target/RISCV/RISCVTargetMachine.cpp

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -103,6 +103,11 @@ static cl::opt<bool>
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cl::desc("Enable Machine Pipeliner for RISC-V"),
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cl::init(false), cl::Hidden);
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static cl::opt<bool> EnableCFIInstrInserter(
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"riscv-enable-cfi-instr-inserter",
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cl::desc("Enable CFI Instruction Inserter for RISC-V"), cl::init(false),
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cl::Hidden);
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extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
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RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target());
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RegisterTargetMachine<RISCVTargetMachine> Y(getTheRISCV64Target());
@@ -169,7 +174,7 @@ RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,
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if (TT.isOSFuchsia() && !TT.isArch64Bit())
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report_fatal_error("Fuchsia is only supported for 64-bit");
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setCFIFixup(true);
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setCFIFixup(!EnableCFIInstrInserter);
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}
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const RISCVSubtarget *
@@ -576,6 +581,9 @@ void RISCVPassConfig::addPreEmitPass2() {
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addPass(createUnpackMachineBundles([&](const MachineFunction &MF) {
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return MF.getFunction().getParent()->getModuleFlag("kcfi");
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}));
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if (EnableCFIInstrInserter)
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addPass(createCFIInstrInserter());
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}
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void RISCVPassConfig::addMachineSSAOptimization() {

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