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llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll

Lines changed: 37 additions & 79 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
22
; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=SSE
3-
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -verify-machineinstrs | FileCheck %s --check-prefixes=AVX
4-
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 -verify-machineinstrs | FileCheck %s --check-prefixes=AVX2
5-
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512VL
6-
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl,+avx512bw -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512BW
3+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,AVX1
4+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,AVX2
5+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512,AVX512VL
6+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl,+avx512bw -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512,AVX512BW
77

88
define void @zero_xmm(<4 x i32> %arg) #0 {
99
; SSE-LABEL: zero_xmm:
@@ -18,23 +18,11 @@ define void @zero_xmm(<4 x i32> %arg) #0 {
1818
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
1919
; AVX-NEXT: retq
2020
;
21-
; AVX2-LABEL: zero_xmm:
22-
; AVX2: # %bb.0:
23-
; AVX2-NEXT: vmovaps %xmm0, 0
24-
; AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm0
25-
; AVX2-NEXT: retq
26-
;
27-
; AVX512VL-LABEL: zero_xmm:
28-
; AVX512VL: # %bb.0:
29-
; AVX512VL-NEXT: vmovaps %xmm0, 0
30-
; AVX512VL-NEXT: vxorps %xmm0, %xmm0, %xmm0
31-
; AVX512VL-NEXT: retq
32-
;
33-
; AVX512BW-LABEL: zero_xmm:
34-
; AVX512BW: # %bb.0:
35-
; AVX512BW-NEXT: vmovaps %xmm0, 0
36-
; AVX512BW-NEXT: vxorps %xmm0, %xmm0, %xmm0
37-
; AVX512BW-NEXT: retq
21+
; AVX512-LABEL: zero_xmm:
22+
; AVX512: # %bb.0:
23+
; AVX512-NEXT: vmovaps %xmm0, 0
24+
; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0
25+
; AVX512-NEXT: retq
3826
store <4 x i32> %arg, ptr null, align 32
3927
ret void
4028
}
@@ -55,26 +43,12 @@ define void @zero_ymm(<8 x i32> %arg) #0 {
5543
; AVX-NEXT: vzeroupper
5644
; AVX-NEXT: retq
5745
;
58-
; AVX2-LABEL: zero_ymm:
59-
; AVX2: # %bb.0:
60-
; AVX2-NEXT: vmovaps %ymm0, 0
61-
; AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm0
62-
; AVX2-NEXT: vzeroupper
63-
; AVX2-NEXT: retq
64-
;
65-
; AVX512VL-LABEL: zero_ymm:
66-
; AVX512VL: # %bb.0:
67-
; AVX512VL-NEXT: vmovaps %ymm0, 0
68-
; AVX512VL-NEXT: vxorps %xmm0, %xmm0, %xmm0
69-
; AVX512VL-NEXT: vzeroupper
70-
; AVX512VL-NEXT: retq
71-
;
72-
; AVX512BW-LABEL: zero_ymm:
73-
; AVX512BW: # %bb.0:
74-
; AVX512BW-NEXT: vmovaps %ymm0, 0
75-
; AVX512BW-NEXT: vxorps %xmm0, %xmm0, %xmm0
76-
; AVX512BW-NEXT: vzeroupper
77-
; AVX512BW-NEXT: retq
46+
; AVX512-LABEL: zero_ymm:
47+
; AVX512: # %bb.0:
48+
; AVX512-NEXT: vmovaps %ymm0, 0
49+
; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0
50+
; AVX512-NEXT: vzeroupper
51+
; AVX512-NEXT: retq
7852
store <8 x i32> %arg, ptr null, align 32
7953
ret void
8054
}
@@ -101,28 +75,12 @@ define void @zero_zmm(<16 x i32> %arg) #0 {
10175
; AVX-NEXT: vzeroupper
10276
; AVX-NEXT: retq
10377
;
104-
; AVX2-LABEL: zero_zmm:
105-
; AVX2: # %bb.0:
106-
; AVX2-NEXT: vmovaps %ymm1, 32
107-
; AVX2-NEXT: vmovaps %ymm0, 0
108-
; AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm0
109-
; AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
110-
; AVX2-NEXT: vzeroupper
111-
; AVX2-NEXT: retq
112-
;
113-
; AVX512VL-LABEL: zero_zmm:
114-
; AVX512VL: # %bb.0:
115-
; AVX512VL-NEXT: vmovups %zmm0, 0
116-
; AVX512VL-NEXT: vxorps %xmm0, %xmm0, %xmm0
117-
; AVX512VL-NEXT: vzeroupper
118-
; AVX512VL-NEXT: retq
119-
;
120-
; AVX512BW-LABEL: zero_zmm:
121-
; AVX512BW: # %bb.0:
122-
; AVX512BW-NEXT: vmovups %zmm0, 0
123-
; AVX512BW-NEXT: vxorps %xmm0, %xmm0, %xmm0
124-
; AVX512BW-NEXT: vzeroupper
125-
; AVX512BW-NEXT: retq
78+
; AVX512-LABEL: zero_zmm:
79+
; AVX512: # %bb.0:
80+
; AVX512-NEXT: vmovups %zmm0, 0
81+
; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0
82+
; AVX512-NEXT: vzeroupper
83+
; AVX512-NEXT: retq
12684
store <16 x i32> %arg, ptr null, align 32
12785
ret void
12886
}
@@ -200,22 +158,22 @@ define void @zero_k(<8 x i32> %arg, <8 x i1> %mask) #0 {
200158
; SSE-NEXT: jne .LBB3_15
201159
; SSE-NEXT: jmp .LBB3_16
202160
;
203-
; AVX-LABEL: zero_k:
204-
; AVX: # %bb.0:
205-
; AVX-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
206-
; AVX-NEXT: vpslld $31, %xmm2, %xmm2
207-
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
208-
; AVX-NEXT: vpslld $31, %xmm1, %xmm1
209-
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
210-
; AVX-NEXT: vmaskmovps %ymm0, %ymm1, 0
211-
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
212-
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
213-
; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2
214-
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
215-
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
216-
; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2
217-
; AVX-NEXT: vzeroupper
218-
; AVX-NEXT: retq
161+
; AVX1-LABEL: zero_k:
162+
; AVX1: # %bb.0:
163+
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
164+
; AVX1-NEXT: vpslld $31, %xmm2, %xmm2
165+
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
166+
; AVX1-NEXT: vpslld $31, %xmm1, %xmm1
167+
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
168+
; AVX1-NEXT: vmaskmovps %ymm0, %ymm1, 0
169+
; AVX1-NEXT: vxorps %xmm0, %xmm0, %xmm0
170+
; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
171+
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
172+
; AVX1-NEXT: vxorps %xmm0, %xmm0, %xmm0
173+
; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
174+
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
175+
; AVX1-NEXT: vzeroupper
176+
; AVX1-NEXT: retq
219177
;
220178
; AVX2-LABEL: zero_k:
221179
; AVX2: # %bb.0:

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