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rampitecmariusz-sikora-at-amd
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[AMDGPU] Add safe-smem-prefetch SubtargetFeature off by default
S_PREFETCH_* instructions may cause host to terminate process in case of the invalid address.
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6 files changed

+344
-232
lines changed

6 files changed

+344
-232
lines changed

llvm/lib/Target/AMDGPU/AMDGPU.td

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Original file line numberDiff line numberDiff line change
@@ -238,6 +238,12 @@ def FeatureInstFwdPrefetchBug : SubtargetFeature<"inst-fwd-prefetch-bug",
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"S_INST_PREFETCH instruction causes shader to hang"
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>;
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def FeatureSafeSmemPrefetch : SubtargetFeature<"safe-smem-prefetch",
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"HasSafeSmemPrefetch",
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"true",
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"SMEM prefetches do not fail on illegal address"
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>;
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def FeatureVcmpxExecWARHazard : SubtargetFeature<"vcmpx-exec-war-hazard",
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"HasVcmpxExecWARHazard",
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"true",

llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Lines changed: 1 addition & 1 deletion
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@@ -3460,7 +3460,7 @@ void AMDGPURegisterBankInfo::applyMappingImpl(
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applyMappingMAD_64_32(B, OpdMapper);
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return;
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case AMDGPU::G_PREFETCH: {
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if (!Subtarget.hasPrefetch()) {
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if (!Subtarget.hasPrefetch() || !Subtarget.hasSafeSmemPrefetch()) {
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MI.eraseFromParent();
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return;
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}

llvm/lib/Target/AMDGPU/GCNSubtarget.h

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Original file line numberDiff line numberDiff line change
@@ -232,6 +232,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
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bool HasVMEMtoScalarWriteHazard = false;
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bool HasSMEMtoVectorWriteHazard = false;
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bool HasInstFwdPrefetchBug = false;
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bool HasSafeSmemPrefetch = false;
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bool HasVcmpxExecWARHazard = false;
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bool HasLdsBranchVmemWARHazard = false;
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bool HasNSAtoVMEMBug = false;
@@ -960,6 +961,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
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bool hasPrefetch() const { return GFX12Insts; }
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bool hasSafeSmemPrefetch() const { return HasSafeSmemPrefetch; }
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// Has s_cmpk_* instructions.
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bool hasSCmpK() const { return getGeneration() < GFX12; }
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llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -855,7 +855,7 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
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if (Subtarget->hasMad64_32())
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setOperationAction({ISD::SMUL_LOHI, ISD::UMUL_LOHI}, MVT::i32, Custom);
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if (Subtarget->hasPrefetch())
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if (Subtarget->hasPrefetch() && Subtarget->hasSafeSmemPrefetch())
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setOperationAction(ISD::PREFETCH, MVT::Other, Custom);
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if (Subtarget->hasIEEEMinMax()) {

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