Skip to content

Commit bebd488

Browse files
committed
fixup! clang-format
Change-Id: I7d33ecc31d2cefd65c6e11019ad4b4db4fd968ef
1 parent 815d698 commit bebd488

File tree

3 files changed

+7
-5
lines changed

3 files changed

+7
-5
lines changed

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,7 @@ static SDValue selectImmSeq(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
206206
}
207207

208208
SDValue selectImm(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
209-
int64_t Imm, const RISCVSubtarget &Subtarget) {
209+
int64_t Imm, const RISCVSubtarget &Subtarget) {
210210
RISCVMatInt::InstSeq Seq = RISCVMatInt::generateInstSeq(Imm, Subtarget);
211211

212212
// Use a rematerializable pseudo instruction for short sequences if enabled.

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,10 @@
2222
// RISC-V specific code to select RISC-V machine instructions for
2323
// SelectionDAG operations.
2424

25-
llvm::SDValue selectImm(llvm::SelectionDAG *CurDAG, const llvm::SDLoc &DL, const llvm::MVT VT,
26-
int64_t Imm, const llvm::RISCVSubtarget &Subtarget);
25+
llvm::SDValue selectImm(llvm::SelectionDAG *CurDAG, const llvm::SDLoc &DL,
26+
const llvm::MVT VT, int64_t Imm,
27+
const llvm::RISCVSubtarget &Subtarget);
28+
2729
namespace llvm {
2830
class RISCVDAGToDAGISel : public SelectionDAGISel {
2931
const RISCVSubtarget *Subtarget = nullptr;

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,10 +12,10 @@
1212
//===----------------------------------------------------------------------===//
1313

1414
#include "RISCVISelLowering.h"
15-
#include "RISCVISelDAGToDAG.h"
1615
#include "MCTargetDesc/RISCVMatInt.h"
1716
#include "RISCV.h"
1817
#include "RISCVConstantPoolValue.h"
18+
#include "RISCVISelDAGToDAG.h"
1919
#include "RISCVMachineFunctionInfo.h"
2020
#include "RISCVRegisterInfo.h"
2121
#include "RISCVSelectionDAGInfo.h"
@@ -16262,7 +16262,7 @@ static SDValue combineOrAndToBitfieldInsert(SDNode *N, SelectionDAG &DAG,
1626216262
SDValue And;
1626316263
APInt MaskImm, OrImm;
1626416264
if (!sd_match(N, m_Or(m_OneUse(m_And(m_Value(And), m_ConstInt(MaskImm))),
16265-
m_ConstInt(OrImm))))
16265+
m_ConstInt(OrImm))))
1626616266
return SDValue();
1626716267

1626816268
// Compute the Known Zero for the AND as this allows us to catch more general

0 commit comments

Comments
 (0)