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Update uint_to_half.ll
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llvm/test/CodeGen/X86/uint_to_half.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx,+f16c | FileCheck %s -check-prefixes=AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,+f16c | FileCheck %s -check-prefixes=AVX,AVX2
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx,+f16c | FileCheck %s -check-prefixes=AVX1
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,+f16c | FileCheck %s -check-prefixes=AVX2
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s -check-prefixes=AVX512
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define <8 x half> @test_uitofp_v8i32_v8f16(<8 x i32> %a) {
@@ -196,5 +196,3 @@ define <16 x half> @test_strict_uitofp_v16i32_v16f16(<16 x i32> %a) {
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%vec = tail call <16 x half> @llvm.experimental.constrained.uitofp.f16.i32(<16 x i32> %a, metadata !"round.dynamic", metadata !"fpexcept.strict")
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ret <16 x half> %vec
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; AVX: {{.*}}

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